AD6654 Analog Devices, AD6654 Datasheet - Page 86
AD6654
Manufacturer Part Number
AD6654
Description
14-Bit, 92.16 MSPS, 4 & 6-Channel Wideband IF to Base Band Receiver
Manufacturer
Analog Devices
Datasheet
1.AD6654.pdf
(88 pages)
Specifications of AD6654
Resolution (bits)
14bit
# Chan
1
Sample Rate
92.16MSPS
Interface
Par
Analog Input Type
Diff-Uni
Adc Architecture
Subranging
Pkg Type
BGA,CSP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD6654BBC
Manufacturer:
AD
Quantity:
13 888
Company:
Part Number:
AD6654BBC
Manufacturer:
ADI
Quantity:
280
Company:
Part Number:
AD6654BBC
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD6654BBC
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD6654BBCZ
Manufacturer:
ADI
Quantity:
853
Company:
Part Number:
AD6654BBCZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Company:
Part Number:
AD6654CBC
Manufacturer:
ADI
Quantity:
283
Company:
Part Number:
AD6654CBC
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD6654CBC
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD6654CBCZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD6654CBCZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD6654XBC
Manufacturer:
ADI
Quantity:
284
Part Number:
AD6654XBCZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD6654
•
•
In the Intel mode microport, the beginning of a read and
write access is indicated by the RDY pin going low. The
access is complete only when the RDY pin goes high. In the
Motorola mode microport, the completion of a read and
write access is indicated by the DTACK pin going low. In
both modes, CS , RD ( DS ), and WR (R/ W ) should be active
until access is complete; otherwise, an incomplete access
results.
In both Intel and Motorola modes, if CS is held low even
after microport read or write access is complete, the
Rev. 0 | Page 86 of 88
•
microport initiates a second access. This is a problem while
writing or reading from coefficient RAM, where each access
writes to or reads from a different RAM address. This can
be fixed by writing to one coefficient RAM address at a
time, that is, the coefficient start and stop address registers
have the same value.
In SPI mode programming, the SCS pin must go high
(inactive) after writing or reading each byte (eight clock
cycles on the SCLK pin).