BLA0912-250R NXP Semiconductors, BLA0912-250R Datasheet - Page 2

Silicon N-channel enhancement mode lateral D-MOS transistor encapsulated in a 2-lead SOT502A flange package with a ceramic cap

BLA0912-250R

Manufacturer Part Number
BLA0912-250R
Description
Silicon N-channel enhancement mode lateral D-MOS transistor encapsulated in a 2-lead SOT502A flange package with a ceramic cap
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
2. Pinning information
3. Ordering information
4. Limiting values
5. Thermal characteristics
BLA0912-250R
Product data sheet
Table 2.
[1]
Table 3.
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Table 5.
[1]
Pin
1
2
3
Type number
BLA0912-250R
Symbol
V
V
P
T
T
Symbol
Z
stg
j
th(j-h)
DS
GS
tot
Connected to flange.
Thermal resistance is determined under RF operating conditions; t
Parameter
drain-source voltage
gate-source voltage
total power dissipation
storage temperature
junction temperature
Parameter
transient thermal impedance from junction to
heatsink
Pinning
Ordering information
Limiting values
Thermal characteristics
drain
gate
source
Description
All information provided in this document is subject to legal disclaimers.
Package
Name
-
Rev. 3 — 1 December 2010
Description
flanged LDMOST ceramic package;
2 mounting holes; 2 leads
Conditions
T
h
≤ 25 °C; t
[1]
p
= 50 μs; δ = 2 %
Simplified outline
Avionics LDMOS power transistor
p
BLA0912-250R
1
2
= 100 μs, δ = 10 %.
Conditions
T
h
= 25 °C
3
Graphic symbol
Min
-
-
-
−65
-
© NXP B.V. 2010. All rights reserved.
[1]
Version
SOT502A
2
Max
75
±22
700
+150
200
sym039
Typ
0.18
1
3
Unit
V
V
W
°C
°C
Unit
K/W
2 of 13

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