ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 116

• Manufacturer Part Number: ST7263BK1
• Description: LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
• Manufacturer: STMicroelectronics

Specifications of ST7263BK1

• 4, 8, 16 Or 32 Kbytes Program Memory: high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection

On-chip peripherals
11.5.5
11.5.6
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Low power modes
Table 41.
Interrupts
Figure 49. Event flags and interrupt generation
1. EVF can also be set by EV6 or an error from the SR2 register.
Table 42.
The I²C interrupt events are connected to the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding Enable Control Bit is set and the I-bit in the
CC register is reset (RIM instruction).
End of Byte Transfer Event
Address Matched Event (Slave mode)
Start Bit Generation Event (Master mode)
Acknowledge Failure Event
Stop Detection Event (Slave mode)
Arbitration Lost Event (Multimaster configuration)
Bus Error Event
Mode
WAIT
HALT
STOPF
(1)
BERR
ARLO
ADSL
No effect on I²C interface.
I²C interrupts cause the device to exit from Wait mode.
I²C registers are frozen.
In Halt mode, the I²C interface is inactive and does not acknowledge data on the bus. The
I²C interface resumes operation when the MCU is woken up by an interrupt with “exit from
Halt mode” capability.
BTF
SB
AF
Low power modes
Interrupts
Interrupt event
Doc ID 7516 Rev 8
ITE
Description
STOPF
ARLO
BERR
Event
ADSL
BTF
flag
SB
AF
control
Enable
ITE
bit
INTERRUPT
EVF
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
Yes
Yes
ST7263Bxx
from
Exit
Halt
No
No
No
No
No
No
No