ST7263BK1 STMicroelectronics, ST7263BK1 Datasheet - Page 89

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ST7263BK1

Manufacturer Part Number
ST7263BK1
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BK1

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
ST7263Bxx
11.3.5
11.3.6
Figure 43. Bit sampling in reception mode
Low power modes
Table 27.
Interrupts
Table 28.
The SCI interrupt events are connected to the same interrupt vector.
These events generate an interrupt if the corresponding Enable Control Bit is set and the
interrupt mask in the CC register is reset (RIM instruction).
RDI LINE
Transmit Data register Empty
Transmission Complete
Received Data Ready to be Read
Overrun Error Detected
Idle Line Detected
Parity Error
Sample
clock
Mode
WAIT
HALT
Interrupt event
Low power modes
Interrupts
1
2
No effect on SCI.
SCI interrupts cause the device to exit from Wait mode.
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/receiving until Halt mode is
exited.
3
4
7/16
5
Doc ID 7516 Rev 8
6
One bit time
7
TC
TDRE
RDRF
OR
IDLE
PE
Event flag
sampled values
8
9
Description
10
TCIE
TIE
RIE
ILIE
PIE
11
Control
Enable
bit
12
6/16
7/16
13
Yes
Yes
Yes
Yes
Yes
Yes
14
from
Wait
On-chip peripherals
Exit
15
16
No
No
No
No
No
No
from
Halt
Exit
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