DS80CH11 Maxim, DS80CH11 Datasheet - Page 12

• Manufacturer Part Number: DS80CH11
• Description: The system energy manager is a highly integrated microcontroller that provides several key features for systems including key scanning and control, battery and power management, as well as two 2-Wire serial I/O Ports
• Manufacturer: Maxim

DS80CH11
011200 12/88
PIN
107
105
60
61
62
63
64
65
66
67
41
59
55
54
53
52
51
50
49
48
39
58
8
7
6
5
4
3
2
1
P9.2 (KSO.10)
P9.3 (KSO.11)
P9.4 (KSO.12)
P9.5 (KSO.13)
P9.6 (KSO.14)
P9.7 (KSO.15)
P9.0 (KSO.8)
P9.1 (KSO.9)
SYMBOL
PM1CS
PM2CS
PSEN
P10.0
P10.1
P10.2
P10.3
P10.4
P10.5
P10.6
P10.7
SMI1
SMI2
SD0
SD1
SD2
SD3
SD4
SD5
SD6
RST
SD7
Port 9 / KSO.15–8: – I/O. Port 9 provides eight lines of open–drain psuedo–bi–direc-
tional I/O port pins. Typically, these lines are used for key–scan outputs.
Port10: –I/O. Port 10 provides eight lines of general purpose Input or Output.
Power Management #1 Chip Select: (Input, active low). This is a chip select signal
used to enable the power management #1 host interface port.
Power Management #2 Chip Select: (Input, active low). This is a chip select signal
used to enable the power management #2 host interface port.
Program Store Enable: Output. This signal goes low when off–chip program memory
is being accessed via Ports 0 and 2. It is commonly connected to optional external ROM
memory as a chip enable. PSEN will provide an active low pulse and is driven high when
external ROM is not being accessed.
Reset: Input, active high The RST input pin contains a Schmitt voltage input to recog-
nize external active high Reset inputs. The pin also employs an internal pull–down
resistor to allow for a combination of wired OR external Reset sources. An RC is not
required for power–up, as the controller provides this function internally.
System Data Bus: (Bi–directional). SD7–0 are data bus lines used for data transfers
between the host processor and the keyboard interface buffer and power management
#1 and #2 interface buffers.
System Management Interrupt #1: (Output, active low). This signal is driven low
when the power management #1 host interface data buffer contains data to be read by
the host. SMI1 will be returned to a High Level when host reads the power management
#1 data buffer register.
System Management Interrupt #2: (Output, active low). This signal is driven low
when the power management #2, host interface data buffer contains data to be read by
the host. SMI2 will be returned to a high level when the host reads the power manage-
ment #2 data buffer register.
DESCRIPTION