71M6541F Maxim, 71M6541F Datasheet - Page 17

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71M6541F

Manufacturer Part Number
71M6541F
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet

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processed with locally connected sensors, as shown in
sensor
For both multiplexer sequences shown in
(where CK32 = 32768 Hz), therefore, the resulting sample rate is 32768 Hz / 13 = 2520.6 Hz.
Table 3
Rev 2
IAP
IAN
IBP
IBN
Pin
(Figure
VA
VB
summarizes the various AFE input configurations.
Channel
ADC10
ADC0
ADC1
ADC2
ADC3
ADC9
ADC
5), the multiplexer sequence is also as shown in
MUX STATE
MUX_SYNC
MUX STATE
MUX_SYNC
Fig. 4:
Fig. 2:
Fig. 3:
Fig. 5:
CROSS
CROSS
Figure 6: States in a Multiplexer Frame (MUX_DIV[3:0] = 3)
Figure 7: States in a Multiplexer Frame (MUX_DIV[3:0] = 4)
CK32
CK32
DIFFA_E = 1
DIFFB_E = 1
RMT_E = 1
Required
Setting
S
S
or
--
--
Table 3: ADC Input Configuration
IA
0
IA
IA
IA
Comment
Differential mode must be selected with DIFFA_E = 1 (I/O
RAM 0x210C[4]). The ADC results are stored in CE RAM
location ADC0 (CE RAM 0x0), and ADC1 (CE RAM 0x1) is not
disturbed.
For locally connected sensors
differential input must be enabled by setting DIFFB_E (I/O
RAM 0x210C[5].
For the remote connected sensor
with a remote shunt sensor, RMT_E (I/O RAM 0x2709[3])
must be set.
In both cases, the ADC results are stored in RAM location
ADC2 (CE RAM 0x2), and ADC3 (CE RAM 0x3) is not
disturbed.
Single-ended mode only. The ADC result is stored in RAM
location ADC10 (CE RAM 0xA).
Single-ended mode only (71M6542F only). The ADC result
is stored in RAM location ADC9 (CE RAM 0x9).
0 0
Figure 6
MUX_DIV[3:0] = 3 Conversions
MUX_DIV = 4 Conversions
VA
Multiplexer Frame
1
Multiplexer Frame
and
VA
VA
VA
Figure
1
Figure
71M6541D/F/G and 71M6542F/G Data Sheet
IB
2
7, the frame duration is 13 CK32 cycles
3. When using one local and one remote
Figure
Not Used
(Figure 2
7.
IB
VB
2
VB
3
(Figure 3
11/5/2010
11/5/2010
Settle
and
Settle
S
S
and
Figure
Figure
0
0
4), the
5)
17

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