71M6541F Maxim, 71M6541F Datasheet - Page 88

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71M6541F

Manufacturer Part Number
71M6541F
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet

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71M6541D/F/G and 71M6542F/G Data Sheet
88
† 71M6542F/G only.
*This pin is sampled every 2 ms and must remain high for 64 ms to be declared a valid high level. This
pin is high-level sensitive.
Name
Always Enabled
Always Enabled
Always Enabled
Always Enabled
Always Enabled
Always Enabled
Wake Enable
Location
WF_BADVDD
WF_CSTART
WF_RSTBIT
WF_ERST
WF_OVF
WF_RST
Name
Wake Flag
Location
28B0[6]
28B0[5]
28B0[3]
28B0[4]
28B0[7]
28B0[2]
De-bounce Description
2 µs
2 µs
No
No
No
No
edge of OPT_RX with 2 µs de-
bounce.
OPT_RXDIS: I/O RAM 0x2457[2]
Wake after RESET.
Wake after RESET bit.
Wake after E_RST.
(ICE must be enabled)
Wake after WD reset.
Wake after cold start - the first
application of power.
Wake after insufficient VBAT
voltage.
Rev 2

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