11274-001 AMI Semiconductor, Inc., 11274-001 Datasheet - Page 32

• Manufacturer Part Number: 11274-001
• Description: Logic and Timing, Programmable Line Lock Clock Generator IC, Tape and Reel
• Manufacturer: AMI Semiconductor, Inc.

FS6131-01
FS6131-01
FS6131-01
FS6131-01
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
12.0
The length of the reference and feedback dividers, their
granularity, and the flexibility of the post Divider make the
FS6131 the most flexible monolithic stand-alone PLL
clock generation device available. The effective block
diagram of the FS6131 when programmed for Stand-
Alone mode is shown in Figure 30.
The source of the Feedback Divider in the Stand-Alone
mode is the output of the VCO. By dividing the input ref-
erence frequency down by Reference Divider (N
multiplying it up in the Main Loop through the Feedback
Divider (N
frequency by the Post Divider (N
relationship for this mode. The equation for the output
clock frequency (f
Figure 30: Block Diagram: Stand-Alone Clock Generation
(optional)
XOUT
SDA
REF
FBK
SCL
XTUNE
(optional)
XIN
ADDR
Device Application:
f
Stand-Alone Clock Generation
F
CLK
), and finally dividing the Main Loop output
REFDSRC
f
Interface
(f
CLK
REF
REF
VCXO
I
2
)
C
XCT[3:0],
) can be written as
XLVTEN
æ
ç ç
è
Reference
N
N
REFDIV[11:0]
Divider
F
R
(N
ö
÷ ÷
ø
R
)
æ
ç ç
è
N
Registers
1
Px
Control
Divider
VCXO
ROM
Px
ö
÷ ÷
ø
PDREF
PDFBK
), we have the defining
,
Frequency
XLROM[2:0]
Detector
Phase-
(Eqn.1)
Frequency
Detector
Phase-
XLPDEN,
XLSWAP
Divider
Feedback
FBKDIV[14:0]
R
), then
DOWN
UP
(N
CRYSTAL LOOP
Charge
MLCP[1:0]
Pump
F
)
DOWN
UP
Charge
XLCP[1:0]
Pump
32
FBKDSRC[1:0]
where the reference source frequency (f
supplied by the VCXO or applied to the REF pin.
Great flexibility is permitted in the programming of the
FS6131 to achieve exact desired output frequencies
since three integers are involved in the computation.
12.1
A Visual BASIC program is available to completely pro-
gram the FS6131 based on the given parameters.
Suppose that the reference source frequency is
14.318MHz and the desired output frequency is 100MHz.
First, factor the 14.318MHz reference frequency (which is
four times the NTSC television color sub-carrier) into
prime numbers. The exact expression is
Controlled
Oscillator
Voltage
OSCTYPE
VCOSPD,
f
Example Calculation
REF
(f
VCO
OM[1:0]
)
14318181
MAIN LOOP
Gobbler
EXTLF
Clock
GBL
Internal
Loop
Filter
LFTC
.
POST3[1:0]
POST2[1:0]
POST1[1:0]
Divider
81
(N
Post
Px
)
Detect
STAT[1:0]
FS6131
2
Lock
5
CMOS/PECL
3
Output
2
11
REF
5
CMOS
) can be either
7
7
1
C
R
LF
LF
.
C
EXTLF
(optional)
LOCK/
IPRG
(optional)
CLKP
CLKN
LP
R
(f
IPRG
CLK
)