S1D10605 Epson Electronics America, Inc., S1D10605 Datasheet - Page 33

• Manufacturer Part Number: S1D10605
• Description: S1d15000 Series Lcd Driver With Ram
• Manufacturer: Epson Electronics America, Inc.

S1D15200 Series
7. FUNCTION DESCRIPTION
System Bus
MPU interface
1. Selecting an interface type
(1) Data transfer
The S1D15200 and S1D15201 drivers use the A0, E (or
RD) and R/W (or WR) signals to transfer data between
the system MPU and internal registers. The combina-
tions used Access to Display Date RAM and Internal
Registers are given in the table blow.
2–8
In order to match the timing requirements of the MPU
with those of the display data RAM and control registers
all data is latched into and out of the driver. This
introduces a one cycle delay between a read request for
data and the data arriving. For example when the MPU
executes a read cycle to access display RAM the current
contents of the latch are placed on the system data bus
while the desired contents of the display RAM are
moved into the latch.
Common
The S1D15200 series transfers data via 8-bit bidirec-
tional data buses (D0 to D7). As its Reset pin has the
MPU interface select function, the 80-series MPU or
the 68-series MPU can directly be connected to the
MPU bus by the selection of HIGH or LOW RES
RES signal input level
A0
1
1
0
0
Active
Active
68 MPU
R/W
1
0
1
0
MPU type
68-series
80-series
RD
0
1
0
1
80 MPU
A0
WR
EPSON
1
0
1
0
Table 1
Table 2
This means that a dummy read cycle has to be executed
at the start of every series of reads. See Figure 1.
No dummy cycle is required at the start of a series of
writes as data is transferred automatically from the input
latch to its destination.
signal level after reset (see Table 1).
When the CS signal is high, the S1D15200 series is
disconnected from the MPU bus and set to stand by.
However, the reset signal is entered regardless of the
internal setup status.
RD
Read display data
Write display data
Read status
Write to internal register (command)
E
R/W
WR
Function
CS
D0 to D7
Rev. 1.1