XC3S100E Xilinx Corp., XC3S100E Datasheet - Page 6

• Manufacturer Part Number: XC3S100E
• Description: Spartan-3e Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

Introduction and Ordering Information
Package Marking
Figure 2
FPGAs in the quad-flat packages.
marking for Spartan-3E FPGAs in BGA packages except
the 132-ball chip-scale package (CP132 and CPG132). The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator.
the top marking for Spartan-3E FPGAs in the CP132 and
CPG132 packages.
6
provides a top marking example for Spartan-3E
Figure 4: Spartan-3E CP132 and CPG132 Package Marking Example
Temperature Range
Temperature Range
Figure 3: Spartan-3E BGA Package Marking Example
Speed Grade
Figure 2: Spartan-3E QFP Package Marking Example
Device Type
Figure 3
Speed Grade
Device Type
Package
BGA Ball A1
Pin P1
Package
Mask Revision Code
Lot Code
Package
C5 = CP132
C6 = CPG132
Ball A1
Figure 4
shows the top
shows
www.xilinx.com
SPARTAN
XC3S250E
PQ208AGQ0525
D1234567A
4C
SPARTAN
XC3S250E
FT256AGQ0525
D1234567A
4C
F1234567-0525
PHILIPPINES
C5AGQ
R
Use the seven digits of the Lot Code to access additional
information for a specific device using the Xilinx web-based
Genealogy
On the QFP and BGA packages, the optional numerical
Stepping Code follows the Lot Code. If no Stepping Code
appears, then the device is Stepping 0.
The “5C” and “4I” part combinations may be dual marked
as “5C/4I”. All “5C” and “4I” part combinations use the
Stepping 1 production silicon and have a ‘1’ Stepping Code
mark.
3S250E
TM
R
Process Code
Fabrication Code
R
TM
R
4C
Viewer.
Device Type
Date Code
Temperature Range
Speed Grade
Stepping Code (optional)
Mask Revision Code
Fabrication Code
Process Code
Date Code
Lot Code
Mask Revision Code
Fabrication Code
Process Technology
Date Code
Stepping Code (optional)
Lot Code
DS312-1_05_032105
DS312-1_06_102905
DS312-1_02_090105
DS312-1 (v3.4) November 9, 2006
Product Specification
R