HD49338F Renesas Electronics Corporation., HD49338F Datasheet - Page 18

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HD49338F

Manufacturer Part Number
HD49338F
Description
Cds/pga & 12-bit A/d Converter
Manufacturer
Renesas Electronics Corporation.
Datasheet
HD49338F/HF
Ripple (pseudo outline made by quantized error) occurres on the point which swithing the ADC output multiple bit in
parallel. When switching the several of ADC output at the same time, ripple (pseudo outline caused by miss
quantization) occurs to the image.
Differential code and gray code are recommended for this countermeasure.
Figure 10 indicates circuit block. When luminance signal changes are smoothly, the number of bit of switching digital
output bit can be reduced and easily to reduce the ripple using this function.
This function is especially effective for longer the settings of sensor more than clk = 30 kHz, and ADC output.
Figure 11 indicates the timing specifications.
To use differential code, complex circuit is necessary at DSP side.
Rev.2.00 May 20, 2005 page 16 of 22
ADCLK
OBP
Digital output
Standard data
control signal
(D9,D8,D7)
From ADC
(In case of select the positive polar)
ADC
Standard data
control signal
10
Differential SW(D5)
Differential data
(1) Differential coded
Figure 11 Differential Code Timing Specifications
Figure 10 Differential Code, Gray Code Circuit
Gray
Binary
2clk_DL
Figure 12 Complex Circuit Example
(In case of select the positive edge of ADCLK with D8)
Carry bit
round
Carry bit
round
(Beginning edge of OBP and standard edge of ADCLK should be exept ±5 ns)
+
1
2clk_DL
2
Standard
data
selector
Standard
Standard
data
selector
3
data
4
5
Gray SW(D4)
(2) Gray
6
Differential data
D9
D8
D7
D0
Gray Binary
conversion
7
Binary conversion
8
9
D9
D8
D7
D0
10-bit
output
10
11

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