DSPIC33FJ64MC508 Microchip Technology Inc., DSPIC33FJ64MC508 Datasheet - Page 141

• Manufacturer Part Number: DSPIC33FJ64MC508
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

For example, suppose a 10 MHz crystal is being used
with “XT with PLL” as the selected oscillator mode. If
PLLPRE<4:0> = 0, then N1 = 2. This yields a VCO
input of 10/2 = 5 MHz, which is within the acceptable
range of 0.8-8 MHz. If PLLDIV<8:0> = 0x1E, then
M = 32. This yields a VCO output of 5 * 32 = 160 MHz,
which is within the 100-200 MHz ranged needed.
If PLLPOST<1:0> = 0, then N2 = 2. This provides a
Fosc of 160/2 = 80 MHz. The resultant device operating
speed is 80/2 = 40 MIPS.
FIGURE 8-2:
TABLE 8-1:
© 2007 Microchip Technology Inc.
Fast RC Oscillator with Divide-by-N
(FRCDIVN)
Fast RC Oscillator with Divide-by-16
(FRCDIV16)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL
(HSPLL)
Primary Oscillator (XT) with PLL
(XTPLL)
Primary Oscillator (EC) with PLL
(ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
Source (Crystal, External Clock
or Internal RC)
2:
Oscillator Mode
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
1.6-16.0 MHz
dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
PLL BLOCK DIAGRAM
Here
PLLPRE
Oscillator Source
0.8-8.0 MHz
Divide by
Secondary
Primary
Primary
Primary
Primary
Primary
Primary
2-33
Internal
Internal
Internal
Internal
Internal
Here
X
EQUATION 8-3:
POSCMD<1:0>
Divide by
PLLDIV
F
2-513
VCO
CY
=
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
100-200 MHz
F
OSC
2
Here
=
1
2
(
PLLPOST
XT WITH PLL MODE
EXAMPLE
Divide by
10000000 * 32
2, 4, 8
FNOSC<2:0>
2 * 2
111
110
101
100
011
011
011
010
010
010
001
000
12.5-80 MHz
DS70287A-page 139
)
Here
=
40 MIPS
Note
F
1, 2
1
1
1
1
1
1
1
OSC