DSPIC33FJ64MC508 Microchip Technology Inc., DSPIC33FJ64MC508 Datasheet - Page 69

• Manufacturer Part Number: DSPIC33FJ64MC508
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

4.0
The dsPIC33FJXXXMCX06/X08/X10 Motor Control
Family devices contain internal Flash program memory
for storing and executing application code. The mem-
ory is readable, writable and erasable during normal
operation over the entire V
Flash memory can be programmed in two ways:
1.
2.
ICSP allows a dsPIC33FJXXXMCX06/X08/X10 Motor
Control Family device to be serially programmed while
in the end application circuit. This is simply done with
two lines for programming clock and programming data
(one of the alternate programming pin pairs: PGC1/
PGD1, PGC2/PGD2 or PGC3/PGD3), and three other
lines for power (V
(MCLR). This allows customers to manufacture boards
with unprogrammed devices and then program the dig-
FIGURE 4-1:
© 2007 Microchip Technology Inc.
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
FLASH PROGRAM MEMORY
This data sheet summarizes the features
of this group of dsPIC33FJXXXMCX06/
X08/X10 Motor Control Family devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“dsPIC33F Family Reference Manual”.
Refer
(www.microchip.com)
dsPIC33F
chapters.
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
DD
dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
to
), ground (V
ADDRESSING FOR TABLE REGISTERS
the
family
DD
range.
Microchip
SS
reference
) and Master Clear
for
1/0
0
the
web
TBLPAG Reg
8 bits
manual
latest
site
Program Counter
24-bit EA
24 bits
ital signal controller just before shipping the product.
This also allows the most recent firmware or a custom
firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data by blocks (or ‘rows’) of
64 instructions (192 bytes) at a time or by single pro-
gram memory word; and the user can erase program
memory in blocks or ‘pages’ of 512 instructions (1536
bytes) at a time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 4-1.
The TBLRDL and TBLWTL instructions are used to read
or write to bits <15:0> of program memory. TBLRDL and
TBLWTL can access program memory in both Word
and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits <23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70287A-page 67