MBM29LV320TE80TN Meet Spansion Inc., MBM29LV320TE80TN Datasheet - Page 30

• Manufacturer Part Number: MBM29LV320TE80TN
• Description: Flash Memory Cmos 32 M 4 M ? 8/2 M ? 16 Bit
• Manufacturer: Meet Spansion Inc.

30
MBM29LV320TE/BE
4.
5.
The automatic programming operation is completed when the data on DQ
bit at which the device return to the read mode and addresses are no longer latched. See “Hardware Sequence
Flags Table”. Therefore the device requires that a valid address to the device be supplied by the system at this
particular instance of time. Hence Data Polling must be performed at the memory location being programmed.
Any commands written to the chip during this period will be ignored. If hardware reset occurs during the pro-
gramming operation, it is impossible to guarantee the data are being written.
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from Read/Reset mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
“1. Embedded Program
typical command strings and bus operations.
Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program prior to erase. Upon executing the Embedded Erase Algorithm
command sequence the device automatically programs and verifies the entire memory for an all zero data pattern
prior to electrical erase (Preprogram function). The system is not required to provide any controls or timings
during these operations.
The system can determine the erase operation status by using DQ
The chip erase begins on the rising edge of the last CE or WE, whichever happens first in the command sequence
and terminates when the data on DQ
to read the mode.
Chip Erase Time; Sector Erase Time × All sectors + Chip Program Time (Preprogramming)
“2. Embedded Erase
command strings and bus operations.
Sector erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector
address (any address location within the desired sector) is latched on the falling edge of CE or WE whichever
starts later, while the command (Data = 30h) is latched on the rising edge of CE or WE which happens first.
After time-out of “t
Multiple sectors are erased concurrently by writing the six bus cycle operations on “MBM29LV320TE/BE Com-
mand Definitions Table” in ■DEVICE BUS OPERATIONS. This sequence is followed with writes of the Sector
Erase command to addresses in other sectors desired to be concurrently erased. The time between writes must
be less than “t
that processor interrupts be disabled during this time to guarantee this condition. The interrupts can be re-
enabled after the last Sector Erase command is written. A time-out of “t
WE whichever starts first initiates the execution of the Sector Erase command(s). If another falling edge of CE
or WE, whichever starts first occurs within the “t
if the sector erase timer window is still open, see “16. DQ
Sector Erase or Erase Suspend during this time-out period will reset the device to the read mode, ignoring the
previous command string. Resetting the device once execution has begun will corrupt the data in the sector. In
that case, restart the erase on those sectors and allow them to complete. (See “12. Write Operation Status” for
Sector Erase Timer operation.) Loading the sector erase buffer may be done in any sequence and with any
number of sectors (0 to 70).
Sector erase does not require the user to program the device prior to erase. The device automatically program
all memory locations in the sector (s) to be erased prior to electrical erase (Preprogram function). When erasing
Chip Erase
Sector Erase
TOW
TOW
” otherwise that command will not be accepted and erasure will not start. It is recommended
” from the rising edge of the last sector erase command, the sector erase operation will begin.
TM
Algorithm” in ■FLOW CHART illustrates the Embedded Erase
TM
Algorithm” in ■FLOW CHART illustrates the Embedded Program
7
Retired Product DS05-20894-5E_July 31, 2007
is “1” (See “12. Write Operation Status”.) at which time the device returns
80/90/10
TOW
” time-out window the timer is reset. (Monitor DQ
3
”, Sector Erase Timer.) Any command other than
7
(Data Polling), DQ
TOW
7
” from the rising edge of last CE or
is equivalent to data written to this
TM
6
Algorithm using typical
(Toggle Bit), or RY/BY.
TM
Algorithm using
3
to determine