MBM29PL3200BE Fujitsu Microelectronics, Inc., MBM29PL3200BE Datasheet - Page 19

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MBM29PL3200BE

Manufacturer Part Number
MBM29PL3200BE
Description
Page Mode Flash Memory 32 M 2 M X 16/1 M X 32 Bit
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MBM29PL3200BE-90
Manufacturer:
FUJI/富士电机
Quantity:
20 000
Read Mode
Page Mode Read
Standby Mode
Automatic Sleep Mode
Output Disable
Autoselect
FUNCTIONAL DESCRIPTION
The device has two control functions which must be satisfied in order to obtain data at the outputs. CE is the
power control and should be used for device selection. OE is the output control and should be used to gate data
to the output pins when a device is selected.
Address access time (t
access time (t
enable access time is the delay from the falling edge of OE to valid data at the output pins (assuming the
addresses have been stable prior to t
power-up, it is necessary to input hardware reset or to change CE pin from “H” to “L”.
The device is capable of fast Page mode read and is compatible with the Page mode Mask ROM read operation.
This mode provides faster read access speed for random locations within a page. The Page size of the device
is 8 words, or 4 double words, within the appropriate Page being selected by the higher address bits A
and the LSB bits A
word/word within that page. This is an asynchronous operation with the microprocessor supplying the specific
double word or word location.
The random or initial page access is equal to t
specified by the microprocessor fall within that Page) is equivalent to t
and OE is the output control and should be used to gate data to the output pins if the device is selected. Fast
Page mode accesses are obtained by keeping A
double word, or changing A
fications.
The device has CMOS standby mode (CE input held at V
50 A. In the standby mode, the output pins are in a high impedance state, independent of OE input.
During Embedded Algorithm operation, V
read with standard access time (t
In the standby mode, the output pins are in the high impedance state, independent of OE input.
Automatic sleep mode lower consumption during read-out of the device data. This mode can be useful for
applications such as a handy terminal that requires low power consumption.
To activate this mode, the device automatically switches itself to low power mode when addresses remain stable
during access time of 150 ns. It is not necessary to control CE, WE and OE in this mode. In this mode, the
current consumed is typically 50 A (CMOS Level).
Since the data are latched during this mode, they are read out continuously. If the addresses are changed, this
mode is canceled automatically, and the device reads the data for changed addresses.
With the OE input is at a logic high level (V
a high impedance state.
The autoselect mode allows the reading out of a binary code from the device and will identify its manufacturer
and type. This mode is intended for use by programming equipment for the purpose of automatically matching
the device to be programmed with its corresponding programming algorithm. This mode is functional over the
entire temperature range of the device.
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
1
to A
ACC
0
(in double word mode) and A
) is equal to the delay from stable addresses to valid output data. The chip enable
1
to A
-1
CE
to select the specific word within that page. See Figure 5.2 for timing speci-
) from either of these standby modes.
ACC
CC
IH
t
OE
Active current (I
), output from the device is disabled. This will put the output pins in
time). When reading out data without changing addresses after
ACC
19
and subsequent Page read access (as long as the locations
to A
2
1
constant and changing A
MBM29PL3200TE/BE
to A
CC
CC2
-1
0.3 V.), when the current consumed is less than
) is required even if CE “H”. The device can be
(in word mode) determining the specific double
PACC
. Here again, CE selects the device
1
and A
0
to select the specific
19
70/90
to A
2
19

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