MBM30LV0128 Fujitsu Microelectronics, Inc., MBM30LV0128 Datasheet - Page 12

• Manufacturer Part Number: MBM30LV0128
• Description: Flash Memory 128 M 16 M X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

12
MBM30LV0128
Page Program : 80h, 10h
Double Page Progam : 82h, 10h
Block Erase : 60h, D0h
I/O0 to I/O7
I/O0 to I/O7
The device is programmed either by the page or partial page. Programming is done by issuing the 80h command
followed by three address cycles then serial data input. The 80h command may be preceded by either 00h, 01h
or 50h to set the pointer to either the first half page, second half page, or spare area respectively. If the pointer
command is not specifically issued, its location is determined by its previous use (see Application Note (2) ) .
After the serial data input, any column address which did not receive new data will not be programmed. This
enables a page to be partially programmed. After the data has been entered, the 10h command will initiate the
embedded programming process. If the 10h command is issued without loading any new data, programming
will not be initiated. A given page may not be partially programmed more than five consecutive times without
an intervening erase operation. During the programming cycle, the R/B pin or Status Register bit I/O6 may be
used to monitor the completion of the programming cycle. Only the Reset and Read Status commands are valid
while programming is in progress. After programming, the Status Register bit I/O0 should be checked to verify
whether the procedure was successful or not.
The device has a double page program function to program two consecutive pages of data in 2 Flash pages.
The page must firstly be in the order of even page data (528 Bytes) followed by “odd page data” secondly (528
Bytes) .The 82h command may be preceded by 00h, 01h or 50h to set the pointer to the first half of even page,
or to the second half of even page or to the spare area of even page respectively. If the pointer command is not
specifically issued, its location is determined by its previous use. Other use or operations are the same as Page
Program operations which use 80h command. (Partial Program, to input 10h command, R/B, Status register.)
The device data is erased in a block consisting of sixteen pages. The erase operation begins with the 60h
command followed by two address cycles in which the block to be erased is entered. While the two address
cycles require A
loaded, the D0h command is entered to initiate the erase operation. The R/B signal may be used to monitor the
completion of the cycle. Upon completion, the Status Register bit I/O0 should be used to verify a successful erase.
R/B
R/B
23
to A
80h
60h
9
to be entered, A
Address and Data Input
Address Input
Figure 5 Page Program
13
Figure 6 Block Erase
to A
9
are “don’t care” bits. Once the block address is successfully
D0h
10h
70h
70h
0
1
0
1
I/O0
I/O0
Pass
Fail
Pass
Fail