MSC8144 Freescale Semiconductor, MSC8144 Datasheet - Page 29

• Manufacturer Part Number: MSC8144
• Description: Quad Core Digital Signal Processor
• Manufacturer: Freescale Semiconductor

The typical power values were measured using an EFR code with the device running at a junction temperature of 25°C. No
peripherals were enabled and the ICache was not enabled. The source code was optimized to use all the ALUs and AGUs and
all four cores. It was created using CodeWarrior
application dependent and varies widely. To assure proper board design with regard to thermal dissipation and maintaining
proper operating temperatures, evaluate power consumption for your application and use the design guidelines in Section 3 of
this document.
At allowable voltage levels, Table 7 lists the estimated power dissipation on the 1.0-V AV
2.6
This section describes the DC electrical characteristics for the MSC8144.
2.6.1
This section describes the DC electrical specifications for the DDR SDRAM interface of the MSC8144.
Note:
2.6.1.1
Table 8 provides the recommended operating conditions for the DDR2 SDRAM component(s) of the MSC8144 when
V
Freescale Semiconductor
Note:
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
Output low current (V
Notes:
DDDDR
(typ) = 1.8 V.
DDR SDRAM uses V
Typical value is based on V
PLL supply
1.
2.
3.
4.
V
V
V
DDPLL0
DDPLL1
DDPLL2
DC Electrical Characteristics
DDR SDRAM DC Electrical Characteristics
Parameter/Condition
V
MV
Peak-to-peak noise on MV
V
equal to MV
Output leakage is measured with all outputs are disabled, 0 V
DDDDR
TT
DDR2 (1.8 V) SDRAM DC Electrical Characteristics
1
REF
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
2
OUT
Table 8. DDR2 SDRAM DC Electrical Characteristics for V
OUT
3
4
is expected to be equal to 0.5 × V
is expected to be within 50 mV of the DRAM V
= 0.280 V)
= 1.420 V)
REF
. This rail should track variations in the DC level of V
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
DDDDR
DD
= 1.0 V, T
Table 7. MSC8144 PLLs Power Dissipation
(typ) = 2.5 V and DDR2 SDRAM uses V
REF
may not exceed ±2% of the DC value.
Typical
TBD
TBD
TBD
A
= 70°C, T
®
3.0. These values are provided as examples only. Power consumption is
DDDDR
Symbol
V
J
MV
DDDDR
= 105°C.
, and to track V
V
V
I
I
V
I
OH
OZ
OL
TT
REF
IH
IL
DD
at all times.
≤
DDDDR
MV
0.49 × V
MV
V
OUT
REF
Maximum
REF
DDDDR
–13.4
Min
–0.3
13.4
–30
1.7
DC variations as measured at the receiver.
≤
+ 0.125
10
10
10
– 0.04
DDDDR
V
DDDDR
DDDDR
.
.
(typ) = 1.8 V.
DD
DD
(typ) = 1.8 V
supplies for the MSC8144 PLLs.
M
0.51 × V
MV
V
V
REF
REF
DD
Max
Electrical Characteristics
1.9
30
—
—
+ 0.3
– 0.125
+ 0.04
DDDDR
Unit
mW
mW
mW
Unit
mA
mA
μA
V
V
V
V
V
29