MSC8144 Freescale Semiconductor, MSC8144 Datasheet - Page 63

• Manufacturer Part Number: MSC8144
• Description: Quad Core Digital Signal Processor
• Manufacturer: Freescale Semiconductor

2.7.14
Figure 40 shows the signal behavior of the
2.7.14.1
Figure 41 Shows the Test Clock Input Timing Diagram
Freescale Semiconductor
EE (input)
EE (output)
Notes:
TCK cycle time
TCK clock high phase measured at V
TCK rise and fall times
Boundary scan input data set-up time
Boundary scan input data hold time
TCK fall to output data valid
TCK fall to output high impedance
TMS, TDI data set-up time
TMS, TDI data hold time
TCK fall to TDO data valid
TCK fall to TDO high impedance
TRST assert time
Note:
1.
2.
All timings apply to OnCE module data transfers as well as any other transfers via the JTAG port.
Characteristics
The ratio between the core clock and CLKOUT is configured during power-on-reset.
Refer to Table 1-4 on page 1-6 for details on EE pin functionality.
EE Signals
JTAG Signals
(Input)
TCK
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
M
EE out
t
EE in
= 1.6 V
TCKR
Characteristics
t
t
EEIN
EEOUT
Symbol
Figure 41. Test Clock Input Timing
EE
pins.
Figure 40. EE Pin Timing
Table 52. EE Pin Timing
Table 53. JTAG Timing
V
Synchronous to Core clock
M
Asynchronous
t
TCKX
Type
t
t
EEOUT
EEIN
t
TCKR
t
V
TCKH
M
t
t
Symbol
t
t
t
t
TCKHOV
TDOHOV
TDOHOZ
t
t
TCKHOZ
TDIVKH
TDIXKH
t
t
t
BSVKH
BSXKH
t
TCKX
TCKH
TCKR
TRST
4 core clock periods
1 core clock period
All frequencies
100.0
33.0
13.0
10.0
Min
0.0
0.0
5.0
—
—
—
—
—
Min
Max
20.0
24.0
10.0
12.0
3.0
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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