MSC8144 Freescale Semiconductor, MSC8144 Datasheet - Page 45

• Manufacturer Part Number: MSC8144
• Description: Quad Core Digital Signal Processor
• Manufacturer: Freescale Semiconductor

For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the transmitter shall fall
entirely within the unshaded portion of the transmitter output compliance mask shown in Figure 13 with the parameters
specified in Table 33 when measured at the output pins of the device and the device is driving a 100 Ω
load. The output eye pattern of an LP-Serial transmitter that implements pre-emphasis (to equalize the link and reduce
inter-symbol interference) need only comply with the transmitter output compliance mask when pre-emphasis is disabled or
minimized.
Freescale Semiconductor
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Characteristic
Characteristic
Characteristic
Table 32. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Table 30. Long Run Transmitter AC Timing Specifications—1.25 GBaud
Table 31. Long Run Transmitter AC Timing Specifications—2.5 GBaud
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
Symbol
Symbol
Symbol
V
V
V
DIFFPP
DIFFPP
DIFFPP
S
S
S
V
V
V
J
J
J
J
UI
J
UI
J
UI
MO
MO
MO
O
D
T
O
D
T
O
D
T
-0.40
-0.40
-0.40
Min
800
800
Min
800
400
Min
800
320
Range
Range
Range
1600
1000
1600
1000
1600
1000
Max
2.30
0.17
0.35
Max
2.30
0.17
0.35
Max
2.30
0.17
0.35
800
400
320
mV
mV
mV
UI
UI
UI
UI
UI
UI
Unit
Unit
Unit
ps
ps
ps
ps
ps
ps
V
V
V
PP
PP
PP
PP
PP
PP
PP
PP
PP
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Voltage relative to COMMON of either signal
Voltage relative to COMMON of either signal
Voltage relative to COMMON of either signal
±100 ppm
Notes
Notes
Notes
Electrical Characteristics
±
5% differential resistive
45