MCD212 Motorola, MCD212 Datasheet - Page 34
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MCD212
Manufacturer Part Number
MCD212
Description
Video Decoder and System Controller(with JTAG)
Manufacturer
Motorola
Datasheet
1.MCD212.pdf
(87 pages)
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MOTOROLA
Figure 5–6. CSYNC Timing in the 50 Hz (FD = 0), Non–interlace Mode (SM = 0)
Figure 5–7. CSYNC Timing in the 60 Hz (FD = 1), Non–interlace Mode (SM = 0)
* Interlace Mode (SM = 1)
NOTES:
M
K
P
J
L
To determine the time from the number of display lines, simply multiply the number of lines by the total line
width (not the active display width). For instance, in an NTSC system with a 63.56 s (from Table 5–5) line
width, the total vertical display time for an interlace display is:
or the display rate is: 59.94 Hz.
VSYNC
CSYNC
VSYNC
CSYNC
ST = 0
312.5
63.56 s x 262.5 lines = 16.6845 ms
280
6.5
2.5
Odd Field (PA = 1)
26
260
310
Table 5–7. Vertical Synchronization Timing
Table 5–6. Vertical Synchronization Timing
* Non–interlace mode (SM = 0)
ST = 1
312.5
M
K
L
P
J
26.5
240
2.5
46
311
261
50 Hz (FD = 0)
ST = 0
312
280
2.5
26
6
50 Hz (FD = 0)
262
312
ST = 0
312.5
26.5
280
Even Field (PA = 0)
2.5
6
(in lines)*
(in lines)
MCD212
1
1
ST = 1
312
240
2.5
46
26
P
P
ST =1
312.5
2
2
46.5
26.5
240
2.5
60 H (FD
60 Hz (FD = 1)
262
240
18
4
3
3
3
Odd Field
Odd Field
(PA = 1)
1)
262.5
240
4.5
18
3
4
60 Hz (FD = 1)
4
5
5
Even Field
Even Field
(PA = 0)
262.5
18.5
240
4
3
5–5
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