MCD212 Motorola, MCD212 Datasheet - Page 45
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MCD212
Manufacturer Part Number
MCD212
Description
Video Decoder and System Controller(with JTAG)
Manufacturer
Motorola
Datasheet
1.MCD212.pdf
(87 pages)
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5–16
5.4.4.11
Programmable via CH#1.
AD3 – AD0: Y address register
CP15 – CP0: line pattern register:
5.4.4.12
Programmable via CH#1 and CH#2.
In case the registers are loaded simultaneously from both channels, then CH#1 has the first priority.
At that moment CH#2 will be ignored.
If the region control is not used, then the operation code OP3 – OP0 of the region control register D0
and D4 must be 0000. This means the end of the region control for the line.
OP3 OP2 OP1 OP0: operation control
CP15 is the left–most pixel.
CP0 is the right–most pixel.
OP
23
23
—
3
OP
22
22
—
2
Cursor Pattern Register (hCF)
Region Control Register 0 - 7 (hD0 - hD7)
OP
21
21
—
1
OP
20
20
—
0
Table 5–31. Region Control Register — Address hD0 – hD7
AD
19
19
—
3
Table 5–30. Cursor Pattern Register — Address hCF
AD
18
18
—
2
AD
17
17
—
1
Figure 5–11. Cursor Pattern Diagram
AD
RF WF
16
16
AD
0 HEX
F HEX
0
CP
15
15
15
5
CP15
WF
CP
14
14
14
4
WF
CP
13
13
13
3
MCD212
WF
CP
12
12
12
2
WF
CP
11
11
11
1
WF
CP
10
10
10
0
CP
X9
9
9
9
CP
X8
8
8
8
CP0
CP
X7
7
7
7
CP
X6
6
6
6
CP
X5
5
5
5
CP
X4
4
4
4
CP
X3
3
3
3
CP
X2
2
2
2
MOTOROLA
CP
X1
1
1
1
CP
X0
0
0
0
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