MCD212 Motorola, MCD212 Datasheet - Page 70

• Manufacturer Part Number: MCD212
• Description: Video Decoder and System Controller(with JTAG)
• Manufacturer: Motorola

9.1.5
These 16–bit registers plus some bits in DCR1[5:0]/DCR2[5:0] give a 22–bit video start register ad-
dress that points to the first byte of the display area that can be located anywhere in the DRAM.
Horizontal or vertical rolling subscreens can be implemented anytime by the “reload VSR and stop”
ICA or DCA instruction. The VSR is also used as an ICA pointer with the “reload VSR” instruction,
which allows indirect addressing inside ICA.
VSR1 (write, 4FFFF4)
VSR2 (write, 4FFFE4)
MOTOROLA
MF1 – MF2
FT1 – FT2
A21 – A16
A15
A15
15
15
Video Start Registers VSR1 and VSR2
A14
A14
14
14
A13
A13
13
13
Table 9–23. Video Start Register 2 — Write, 4FFFE4
Table 9–22. Video Start Register 1 — Write, 4FFFF4
(Mosaic Factor) Set the horizontal mosaic factor
(File type) Indicate the type of file to be displayed:
Most significant bits of the DCA2 pointer.
A12
A12
12
12
Table 9–21. Channel 2 Display File Type
A11
A11
Table 9–20. Channel 2 Mosiac Factor
11
11
A10
A10
10
10
MF1
FT1
0
0
1
1
0
1
1
A9
A9
9
9
MF2
FT2
0
1
0
1
0
1
x
MCD212
A8
A8
8
8
Display File Type
A7
A7
Mosaic Factor
7
7
Run–length
Mosaic
Bitmap
16
2
4
8
A6
A6
6
6
A5
A5
5
5
A4
A4
4
4
A3
A3
:
3
3
A2
A2
2
2
A1
A1
1
1
A0
A0
0
0
9–7