MCD212 Motorola, MCD212 Datasheet - Page 37
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MCD212
Manufacturer Part Number
MCD212
Description
Video Decoder and System Controller(with JTAG)
Manufacturer
Motorola
Datasheet
1.MCD212.pdf
(87 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCD212FU
Manufacturer:
MOTO
Quantity:
366
5–8
5.4.4
ICA/DCA instructions are contained in the system RAM. They are long–word aligned and long–word
wide. The most significant byte indicates which register or registers are updated by the information
contained in the other bytes. The instructions can be divided into two groups. The instructions from the
first group affect the control of the instruction fetches, the display parameters, and interrupt generation
(see Table 5–11). The instructions from the second group affect the video decoder and visual effects
part (see Chapter 11). The control of the instructions fetches and display parameters can also be
affected by the system (CPU). None of the registers can be read by the system.
ICA/DCA Instructions
NOTE: An automatic stop instruction is performed at the end of the available area (when the effective DCA is
0000 –––– –––– ––––
–––– –––– –––– ––––
0001 –––– –––– ––––
–––– –––– –––– ––––
0010 –––– –– pp pppp
pppp pppp pppp pp ––
0011 –––– –– pp pppp
pppp pppp pppp pp ––
0100 –––– –– pp pppp
pppp pppp pppp pppp
0101 –––– –– pp pppp
pppp pppp pppp pppp
0110 –––– –––– ––––
–––– –––– –––– ––––
0111 1 ––– –––– ––––
–––– –––– ––0b cdef
IC1
0
1
1
1
larger than indicated). The allocated memory size is always 64 bytes even if the possible number of
fetches is lower.
Possible DCA1 Fetches Per Line
Instruction
(Bit 31 – 0)
Table 5–10. Possible DCA1/DCA2 Fetches per Line
DC1
x
0
1
1
Table 5–11. ICA Control Instructions
CF
x
x
0
1
RELOAD DISPLAY
RELOAD DCP and
RELOAD VSR and
PARAMETERS
RELOAD DCP
RELOAD VSR
INTERRUPT
Acronym
STOP
STOP
STOP
NOP
(in bytes)
DCA1
32
64
0
0
MCD212
Stop the control sequence. The instruction
fetches are stopped until the next field.
No operation.
Reload the DCP register and its associated
address counter with the specified pointer (p).
Reload the DCP register and its associated
address counter with the specified pointer (p)
and stop control fetches as STOP instruction.
Reload ICA pointer. It functions as a jump
instruction. It does not affect the VSR pointer.
Reload the VSR register and the video address
counter with the specified pointer and stop the
control fetches as STOP instruction.
Set IT bit in CSR register.
b = CM c = MF1 d = MF2 e = FT1
f = FT2
IC2
0
1
1
1
Possible DCA2 Fetches Per Line
DC2
x
0
1
1
Action
CF
x
x
0
1
(in bytes)
DCA2
32
64
0
0
MOTOROLA