MB81F641642D Fujitsu Microelectronics, MB81F641642D Datasheet - Page 17

no-image

MB81F641642D

Manufacturer Part Number
MB81F641642D
Description
4 x 1M x 16-Bit SDRAM
Manufacturer
Fujitsu Microelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MB81F641642D-102FN-B-GJ
Manufacturer:
FUJITSU/富士通
Quantity:
20 000
(Continued)
When the full burst operation is executed at single write mode, Auto-precharge command is valid only at write
operation.
The burst type can be selected either sequential or interleave mode. But only the sequential mode is usable to the
full column burst. The sequential mode is an incremental decoding scheme within a boundary address to be
determined by burst length, it assigns +1 to the previous (or initial) address until reaching the end of boundary
address and then wraps round to least significant address (= 0).
FULL COLUMN BURST AND BURST STOP COMMAND (BST)
The full column burst is an option of burst length and available only at sequential mode of burst type. This full column
burst mode is repeatedly access to the same column. If burst mode reaches end of column address, then it wraps
round to first column address (= 0) and continues to count until interrupted by the news read (READ) /write (WRIT),
precharge (PRE), or burst stop (BST) command. The selection of Auto-precharge option is illegal during the full
column burst operation except write command at BURST READ & SINGLE WRITE mode.
The BST command is applicable to terminate the burst operation. If the BST command is asserted during the burst
mode, its operation is terminated immediately and the internal state moves to Bank Active.
When read mode is interrupted by BST command, the output will be in High-Z.
For the detail rule, please refer to TIMING DIAGRAM-8.
When write mode is interrupted by BST command, the data to be applied at the same time with BST command will
be ignored.
BURST READ & SINGLE WRITE
The burst read and single write mode provides single word write operation regardless of its burst length. In this
mode, burst read operation does not be affected by this mode.
Length
Burst
2
4
8
Starting Column
A
Address
X X 0
X X 1
X 0 0
X 0 1
X 1 0
X 1 1
2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
A
MB81F641642D-75/-102/-102L
1
A
0
0 – 1 – 2 – 3 – 4 – 5 – 6 – 7
1 – 2 – 3 – 4 – 5 – 6 – 7 – 0
2 – 3 – 4 – 5 – 6 – 7 – 0 – 1
3 – 4 – 5 – 6 – 7 – 0 – 1 – 2
4 – 5 – 6 – 7 – 0 – 1 – 2 – 3
5 – 6 – 7 – 0 – 1 – 2 – 3 – 4
6 – 7 – 0 – 1 – 2 – 3 – 4 – 5
7 – 0 – 1 – 2 – 3 – 4 – 5 – 6
Sequential Mode
0 – 1 – 2 – 3
1 – 2 – 3 – 0
2 – 3 – 0 – 1
3 – 0 – 1 – 2
0 – 1
1 – 0
0 – 1 – 2 – 3 – 4 – 5 – 6 – 7
1 – 0 – 3 – 2 – 5 – 4 – 7 – 6
2 – 3 – 0 – 1 – 6 – 7 – 4 – 5
3 – 2 – 1 – 0 – 7 – 6 – 5 – 4
4 – 5 – 6 – 7 – 0 – 1 – 2 – 3
5 – 4 – 7 – 6 – 1 – 0 – 3 – 2
6 – 7 – 4 – 5 – 2 – 3 – 0 – 1
7 – 6 – 5 – 4 – 3 – 2 – 1 – 0
0 – 1 – 2 – 3
1 – 0 – 3 – 2
2 – 3 – 0 – 1
3 – 2 – 1 – 0
Interleave
Preliminary (AE4.1E)
0 – 1
1 – 0
17

Related parts for MB81F641642D