MB81F641642D Fujitsu Microelectronics, MB81F641642D Datasheet - Page 6

• Manufacturer Part Number: MB81F641642D
• Description: 4 x 1M x 16-Bit SDRAM
• Manufacturer: Fujitsu Microelectronics

6
MB81F641642D-75/-102/-102L
DQM TRUTH TABLE
CKE TRUTH TABLE
Notes: *1. The CSUS command requires that at least one bank is active. Refer to STATE DIAGRAM.
Bank Active Clock Suspend Mode Entry
Any
(Except Idle)
Clock
Suspend
Idle
Idle
Self Refresh Self-refresh Exit
Idle
Power
Down
Data Write/Output Enable for Lower Byte
Data Write/Output Enable for Upper Byte
Data Mask/Output Disable for Lower Byte
Data Mask/Output Disable for Upper Byte
Current
State
*2. REF and SELF commands should only be issued after all banks have been precharged (PRE or PALL
*3. SELF and PD commands should only be issued after the last read data have been appeared on DQ.
NOP or DESL command should be issued after CSUS and PRE (or PALL) commands asserted at the
same time.
command). Refer to STATE DIAGRAM.
Clock Suspend Continue
Clock Suspend Mode Exit
Auto-refresh Command
Self-refresh Entry
Power Down Entry
Power Down Exit
Function
Function
Notes
*2, 3
*1 CSUS
*1
*2
*3
Symbol
SELFX
MASK U
MASK L
Symbol
ENBL U
ENBL L
SELF
REF
PD
n-1 n
H
H
H
H
H
L
L
L
L
L
L
CKE
H
H
H
H
H
L
H
L
L
L
L
n-1
H
H
H
H
Preliminary (AE4.1E)
CS RAS CAS WE
X
X
X
H
H
H
L
L
L
L
L
CKE
X
X
H
X
H
X
H
X
X
L
L
n
X
X
X
X
X
H
X
H
X
H
X
X
X
L
L
X
H
H
H
H
X
X
H
X
X
X
(BA)
DQML
A
A
X
X
X
X
X
X
X
X
X
X
X
13
12
X
H
X
L
,
A
X
X
X
X
X
X
X
X
X
X
X
11
(AP)
DQMU
A
X
X
X
X
X
X
X
X
X
X
X
10
X
X
H
L
A
to
A
X
X
X
X
X
X
X
X
X
X
X
0
9