MB81F641642D Fujitsu Microelectronics, MB81F641642D Datasheet - Page 41

• Manufacturer Part Number: MB81F641642D
• Description: 4 x 1M x 16-Bit SDRAM
• Manufacturer: Fujitsu Microelectronics

DQM
(DQML, DQMU)
DQM
(DQML, DQMU)
Notes: *1. Even if the final data is masked by DQM, the precharge does not start the clock of final data input.
Notes: *1. Precharge at Read with Auto-precharge command (READA) is started from number of clocks that is the same as
CLK
Command
CLK
Command
DQ
DQ
*2. Next ACTV command should be issued after BL+t
*2. Once auto precharge command is asserted, no new command within the same bank can be issued.
*3. Auto-precharge command doesn’t affect at full column burst operation except Burst READ & Single Write.
*4. Precharge at write with Auto-precharge is started after the t
*5. Next command should be issued after BL+ t
Burst Length (BL) after the READA command is asserted.
ACTV
ACTV
TIMING DIAGRAM – 14 : WRITE WITH AUTO-PRECHARGE
MB81F641642D-75/-102/-102L
TIMING DIAGRAM – 13 : READ WITH AUTO-PRECHARGE
(EXAMPLE @ CL = 2, BL = 2 Applied to same bank)
(EXAPLE @ CL = 2, BL = 2 Applied to same bank)
t
RAS
t
READA
WRITA
RAS
(min)
D1
(min)
(same value as BL)
RP
(min) at CL = 2, BL+1+t
2 clocks
RP
D2
(min) from READA command.
t
DPL
*1
(min)
DPL
from the end of burst.
*4
Q1
NOP or DESL
BL+t
NOP or DESL
RP
BL+t
(min) at CL = 3 from WRITA command.
RP
RP
t
(min)
(min)
DAL
Q2
(min)
*2
*5
t
RP
*1, *2, *3
(min)
Preliminary (AE4.1E)
ACTV
ACTV
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