MB81F641642D Fujitsu Microelectronics, MB81F641642D Datasheet - Page 5

• Manufacturer Part Number: MB81F641642D
• Description: 4 x 1M x 16-Bit SDRAM
• Manufacturer: Fujitsu Microelectronics

COMMAND TRUTH TABLE
Notes: *1. V = Valid, L = Logic Low, H = Logic High, X = either L or H.
Device Deselect
No Operation
Burst Stop
Read
Read with Auto-precharge
Write
Write with Auto-precharge
Bank Active
Precharge Single Bank
Precharge All Banks
Mode Register Set
FUNCTIONAL TRUTH TABLE Note *1
*2. All commands assumes no CSUS command on previous rising edge of clock.
*3. All commands are assumed to be valid state transitions.
*4. All inputs are latched on the rising edge of clock.
*5. NOP and DESL commands have the same effect on the part. Unless spcifically noted, NOP will
*6. READ, READA, WRIT and WRITA commands should only be issued after the corresponding bank has
*7. ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL
*8. Required after power up. Refer to POWER-UP INITIALIZATION in page 19.
*9. MRS command should only be issued after all banks have been precharged (PRE or PALL command).
Function
represent both NOP and DESL command in later discriptions.
been activated (ACTV command). Refer to STATE DIAGRAM.
command).
Refer to STATE DIAGRAM.
MB81F641642D-75/-102/-102L
Notes Symbol
*8, 9
*5
*5
*6 READ
*6 READA
*6
*6 WRITA
*7
Note *2, *3, and *4
DESL
ACTV
WRIT
PALL
NOP
MRS
PRE
BST
n-1
H
H
H
H
H
H
H
H
H
H
H
CKE
X
X
X
X
X
X
X
X
X
X
X
n
CS RAS CAS WE
H
L
L
L
L
L
L
L
L
L
L
X
H
H
H
H
H
H
L
L
L
L
X
H
H
H
H
H
L
L
L
L
L
X
H
H
H
H
L
L
L
L
L
L
(BA)
A
A
X
X
X
V
V
V
V
V
V
X
L
13
12
,
A
X
X
X
X
X
X
X
V
X
X
L
11
Preliminary (AE4.1E)
(AP)
A
H
H
H
X
X
X
V
L
L
L
L
10
A
X
X
X
X
X
X
X
V
X
X
V
9
A
A
to
X
X
X
V
V
V
V
V
X
X
V
8
0
5