XR17D154 Exar Corporation, XR17D154 Datasheet

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XR17D154

Manufacturer Part Number
XR17D154
Description
Four-channel Pci-bus Uart
Manufacturer
Exar Corporation
Datasheet

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FEBRUARY 2003
GENERAL DESCRIPTION
The XR17D154
Asynchronous Receiver and Transmitter (UART) with
same package and pin-out as the Exar XR17C158
octal UART. The device is designed to meet today’s
32-bit PCI Bus and high bandwidth requirement in
communication systems. The global interrupt source
register
indication for all 4 channels to speed up interrupt
parsing. Each UART is independently controlled and
has its own 16C550 compatible 5G register set,
transmit and receive FIFOs of 64 bytes, fully
programmable transmit and receive FIFO trigger
levels, transmit and receive FIFO level counters,
automatic hardware flow control with programmable
hysteresis,
control, IrDA (Infrared Data Association) encoder/
decoder, 8 multi-purpose definable inputs/outputs,
and a 16-bit general purpose timer/counter.
N
APPLICATIONS
Exar
F
OTE
IGURE
Universal Form Factor PCI Bus Add-in Card
Remote Access Servers
Ethernet Network to Serial Ports
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
:
Corporation 48720 Kato Road, Fremont CA, 94538
1 Covered by U.S. Patents #5,649,122, #5,949,787
1. B
provides
LOCK
automatic
Power Supply)
CLK (33M Hz)
3.3V or 5V
RST#
AD[31:0]
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
INTA#
IDSEL
PERR#
SERR#
PAR
EECK
EEDI
EEDO
EECS
ENIR
(PCI VI/O
1
(D154) is a quad PCI Bus Universal
D
IAGRAM
a
complete
software
Configuration
EEPROM
PCI Local
Registers
Interface
Interface
Space
Bus
interrupt
(Xon/Xoff)
Tim er/Counter
Configuration
16-bit
PRELIMINARY
Registers
Device
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
status
flow
(510) 668-7000
FEATURES
High Performance Quad UART
Universal PCI Bus Buffers - 3.3V or 5V Operation
32-bit PCI Bus 2.2 Target Interface Compliance
32-bit PCI Bus Interface with EEPROM Interface
A Global Interrupt Source Register for all 4 UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
Eight Multi-Purpose Inputs/outputs
General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up
Same package and pin-out as the XR17D158,
XR17C158,
(20x20x1.4mm 144-TQFP)
UART
Regs
BRG
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Transmit and Receive FIFO Level Counters
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
Automatic RS485 Half-duplex Control Output
with Selectable Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 4 Mbps Serial Data Rate at 8X
UART Channel 3
UART Channel 0
UART Channel 2
Crystal Osc/Buffer
UART Channel 1
Inputs/Outputs
Multi-purpose
TX & RX
64 Byte R X FIFO
64 Byte TX FIFO
FAX (510) 668-7017
.
ENDE C
IR
XR17L154
TX0, RX0, DTR0#,
DSR0#, R TS0#,
CTS0#, CD0#, RI0#
TX3, RX3, DTR3#,
DSR3#, R TS3#,
CTS3#, CD3#, RI3#
M PIO0- MPIO7
XTAL1
XTAL2
TMR CK
XR17D154
GND
3.3V or 5V VCC
(Core Logic)
and
www.exar.com
XR17C154
REV. P1.0.0

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