XR17D154 Exar Corporation, XR17D154 Datasheet - Page 42

• Manufacturer Part Number: XR17D154
• Description: Four-channel Pci-bus Uart
• Manufacturer: Exar Corporation

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PRELIMINARY
LSR[7]: Receive FIFO Data Error Flag
MODEM STATUS REGISTER (MSR) - READ ONLY
This register provides the current state of the modem interface signals, or other peripheral device that the
UART is connected. Lower four bits of this register are used to indicate the changed information. These bits are
set to a logic 1 whenever a signal from the modem changes state. These bits may be used as general purpose
inputs/outputs when they are not used with modem signals.
MSR[0]: Delta CTS# Input Flag
MSR[1]: Delta DSR# Input Flag
MSR[2]: Delta RI# Input Flag
MSR[3]: Delta CD# Input Flag
MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7) and RTS/CTS flow control select (MCR bit-2). Auto CTS flow control allows starting and
stopping of local data transmissions based on the modem CTS# signal. A logic 1 on the CTS# pin will stop
UART transmitter as soon as the current character has finished transmission, and a logic 0 will resume data
transmission. Normally MSR bit-4 bit is the compliment of the CTS# input. However in the loopback mode, this
bit is equivalent to the RTS# bit in the MCR register. The CTS# input may be used as a general purpose input
when the modem interface is not used.
MSR[5]: DSR Input Status
DSR# (active high, logical 1). This input may be used for auto DTR/DSR flow control function, see auto
\hardware flow control section. Normally this bit is the compliment of the DSR# input. In the loopback mode,
this bit is equivalent to the DTR# bit in the MCR register. The DSR# input may be used as a general purpose
input when the modem interface is not used.
MSR[6]: RI Input Status
RI# (active high, logical 1). Normally this bit is the compliment of the RI# input. In the loopback mode this bit is
equivalent to bit-2 in the MCR register. The RI# input may be used as a general purpose input when the
modem interface is not used.
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Logic 0 = No FIFO error (default).
Logic 1 = An indicator for the sum of all error bits in the RX FIFO. At least one parity error, framing error or
break indication is in the FIFO data. This bit clears when there is no more error(s) in the FIFO.
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a logic 0 to a logic 1, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3.
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UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
XR17D154
REV. P1.0.0