MT55L128L18F1 Micron Semiconductor Products, Inc., MT55L128L18F1 Datasheet - Page 16

• Manufacturer Part Number: MT55L128L18F1
• Description: 2Mb ZBT SRAM, 3.3V Vdd, 3.3V I/O, Flow-Through,
• Manufacturer: Micron Semiconductor Products, Inc.

NOT RECOMENDED FOR NEW DESIGNS
NOP, STALL AND DESELECT TIMING PARAMETERS
NOTE: 1. The IGNORE CLOCK EDGE or STALL cycle (clock 3) illustrates CKE# being used to create a “pause.” A WRITE is not
2Mb: 128K x 18, 64K x 32/36 3.3V I/O, Flow-Through ZBT SRAM
MT55L128L18F1_C.p65 – Rev. C, Pub. 11/02
COMMAND
SYMBOL
t
t
KHQX
KHQZ
ADDRESS
ADV/LD#
BWx#
R/W#
CKE#
2. For this waveform, ZZ and OE# are tied LOW.
3. CE# represents three signals. When CE# = 0, it represents CE# = 0, CE2# = 0, CE2 = 1.
4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The most
CLK
CE#
DQ
performed during this cycle.
recent data may be from the input data register.
WRITE
D(A1)
A1
1
D(A1)
Q(A2)
READ
A2
2
MIN MAX MIN MAX UNITS
3.0
-10
NOP, STALL AND DESELECT CYCLES
5.0
STALL
3
3.0
Q(A2)
-12
5.0
READ
Q(A3)
A3
4
ns
ns
3.3V I/O, FLOW-THROUGH ZBT SRAM
16
WRITE
D(A4)
A4
Q(A3)
5
STALL
2Mb: 128K x 18, 64K x 32/36
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D(A4)
NOP
7
DON’T CARE
READ
Q(A5)
A5
8
t KHQX
DESELECT
Q(A5)
9
©2002, Micron Technology, Inc.
t KHQZ
UNDEFINED
CONTINUE
DESELECT
10