MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 36

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

2.2
The Transmit Convergence (TC) function is common for both the IMA and TC modes. It integrates the circuitry to
support ATM cell payload scrambling, HEC generation and the generation of Idle/Filler/ICP cells for use with the
T1/E1/J1 or DSL trunks. Each of the available ATM TC circuits can use the polynomial X
cell payload field. The MT90222/3/4 ATM cell payload scrambling function can be disabled.
The ITU I.432 polynomial X
Forum polynomial X
polynomial can be disabled. The resulting calculation is then written on the HEC field and the ATM cell is ready (i.e.,
complies with the IMA transmit protocol) for transmission over the flexible TDM Interface.
In cases where the TC block requests a cell to be transferred to any of the serial interfaces and the TX UTOPIA
FIFO has no cell ready for transmission, then the TC block will automatically send an IDLE cell (in TC mode) or a
Filler cell (in IMA mode) to the line. The default values for the Idle and the Filler cells comply with the ATM IMA
Specification and are pre-loaded in the MT90222/3/4 following a reset. The TX Cell RAM Control (0x0080) register
can be used to re-initialize the TX Cell RAM.
2.2.1
The internal TX Cell RAM can hold up to 128 cells. The following 10 cells are reserved for MT90222/3/4 operation:
•
•
•
The remaining 118 cells can be assigned to any of the 40 TX FIFOs. The TX FIFOs are divided into 24 TX UTOPIA
FIFOs and 16 TX Link FIFOs. The MT90222/3/4 implements one TX UTOPIA FIFO for each link when used in TC
mode and one for each IMA Group, totalling up to 24 TX UTOPIA FIFOs. Each TX UTOPIA FIFO is associated with
one TX UTOPIA Address. Please refer to section 5.0 "UTOPIA Interface Operation" for more details.
In addition, for each link to be used in IMA mode, an internal TX Link FIFO is utilized. These TX Link FIFOs hold the
cell streams that are to be sent on each TX serial port. There is a total of 16 TX Link FIFOs and their size is
programmed on a per group basis using the TX IMA Control (0x0321-0x0324) register. When a link is used in TC
mode, its corresponding TX Link FIFO is disabled and the TX Link UTOPIA FIFO is used.
The MT90222 and MT90223 support a subset of the 16 links and only the registers corresponding to available links
are meaningful.
TX IMA UTOPIA FIFO Length Definition (0x0093-0x0096) registers are used to set the size of the IMA FIFO. A
maximum of 8 cells can be assigned to any single FIFO. The size of unused TX IMA UTOPIA FIFOs should be set
to zero. The recommended size for the IMA Group TX UTOPIA FIFO is 2.
In IMA Mode, the ATM User Cells are first placed in the TX IMA UTOPIA FIFO and then transferred, by the internal
round robin scheduler, to the proper TX Link FIFO.
The TX IMA Control (0x0321-0x0324) registers are used to set the size of the internal TX Link FIFO for a link in
IMA mode. An upper and lower level limit must be set for the internal TX Link FIFO.
The recommended upper limit value for the internal TX Link FIFO is five and the recommended lower limit is one
when operating in ITC clocking mode. When operating in CTC mode, the recommended upper limit value for the
internal TX Link FIFO is six and the recommended lower limit is one. In the case where CTC mode is used and
when the ICP cells on all the links are sent with the same ICP cell offset and when carrying a CBR-type traffic, an
upper value of 7 may be required.
In TC Mode, the ATM User Cells are queued in the TX Link UTOPIA FIFO (0x008B - 0x0092) until sent over the
serial link.
one ICP cell for each IMA Group for a total of eight cells
one common Filler Cell used in IMA mode
one Idle Cell used in TC mode
The ATM Transmission Convergence
TX Cell RAM and TX FIFO Length
6
+ X
4
8
+ X
+ X
2
2
+ X + 1 is used to generate the HEC field of the ATM cell. By default, the ATM
+ 1 is added to the calculated HEC octet. The addition of the ATM Forum
Zarlink Semiconductor Inc.
MT90222/3/4
36
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+ 1 to scramble the ATM
Data Sheet