PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 18

• Manufacturer Part Number: PIC16C63A
• Description: 28/40-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

PIC16C63A/65B/73B/74B
2.2.2.4
This register contains the individual enable bits for the
peripheral interrupts.
FIGURE 2-6:
DS30605A-page 18
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: PIC16C63A/73B devices do not have a Parallel Slave Port implemented. This bit location is reserved on these
PSPIE
R/W-0
2: PIC16C63A/65B devices do not have an A/D module. This bit location is reserved on these devices. Always maintain
(1)
PIE1 REGISTER
PSPIE
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
ADIE
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
devices. Always maintain this bit clear.
this bit clear.
ADIE
R/W-0
(2)
(2)
PIE1 REGISTER (ADDRESS 8Ch)
(1)
: A/D Converter Interrupt Enable bit
: Parallel Slave Port Read/Write Interrupt Enable bit
R/W-0
RCIE
R/W-0
TXIE
SSPIE
R/W-0
CCP1IE
R/W-0
TMR2IE
R/W-0
Note:
TMR1IE
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1998 Microchip Technology Inc.
read as ‘0’