PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 54

• Manufacturer Part Number: PIC16C63A
• Description: 28/40-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

PIC16C63A/65B/73B/74B
8.2
This section contains register definitions and opera-
tional characteristics of the SPI module.
Additional information on SPI operation may be found
in the PICmicro
(DS33023).
8.2.1
A block diagram of the SSP Module in SPI Mode is
shown in Figure 8-3.
The SPI mode allows 8-bits of data to be synchro-
nously transmitted and received simultaneously. To
accomplish communication, typically three pins are
used:
• Serial Data Out (SDO) RC5/SDO
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally a fourth pin may be used when in a slave
mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the fol-
lowing to be specified:
• Master Operation (SCK is the clock output)
• Slave Mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Clock Edge (Output data on rising/falling edge of
• Clock Rate (master operation only)
• Slave Select Mode (Slave mode only)
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON reg-
ister and then set bit SSPEN. This configures the SDI,
SDO, SCK and SS pins as serial port pins. For the pins
to behave as the serial port function, they must have
their data direction bits (in the TRISC register) appro-
priately programmed. That is:
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (master operation) must have TRISC<3>
• SCK (Slave mode) must have TRISC<3> set
• SS must have TRISA<5> set
DS30605A-page 54
SCK)
cleared
SPI Mode
OPERATION OF SSP MODULE IN SPI
MODE
Mid-Range Reference Manual
RC4/SDI/SDA
RC3/SCK/SCL
RA5/SS/AN4
FIGURE 8-3:
RC4/SDI/SDA
RC5/SDO
RA5/SS/AN4
RC3/SCK/
SCL
Note:
Note:
When the SPI is in Slave Mode with SS pin
control enabled, (SSPCON<3:0> = 0100)
the SPI module will reset if the SS pin is set
to V
If the SPI is used in Slave Mode with
CKE = '1', then the SS pin control must be
enabled.
DD
Read
SS Control
.
Select
TRISC<3>
SSP BLOCK DIAGRAM
(SPI MODE)
Edge
SSPM3:SSPM0
Enable
bit0
Select
Edge
SSPBUF reg
SSPSR reg
1998 Microchip Technology Inc.
Clock Select
4
2
Write
Prescaler
4, 16, 64
clock
shift
TMR2 output
data bus
Internal
2
T
CY