MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 103
MT90812
Manufacturer Part Number
MT90812
Description
Integrated Digital Switch (IDX)
Manufacturer
Mitel Networks Corporation
Datasheet
1.MT90812.pdf
(105 pages)
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MT90812
Advance Information
Notes:
Voltages are with respect to ground (Vss) unless otherwise stated.
Supply Voltage and operating temperature are as per Recommended Operating Conditions.
Timing parameters are as per AC Electrical Characteristics - Timing Parameter Measurement Voltage Levels
1: Measured with respect to 3/4 bittime, which for 4.096 Mb/s is 244ns x 3/4 = 183ns from beginning of bit cell
2: Measured with respect to 3/4 bittime, which for 8.192 Mb/s is 122ns x 3/4 = 91.5ns from beginning of bit cell
3: CL= 150pF, RL=1 K
load.
4: High Impedance is measured by pulling to the appropriate rail with RL with timing corrected to cancel time to discharge CL.
5: CL= 150pF capacitive load.
6: DS pin is used as DS in Motorola Non-Multiplexed Mode.
7: Acknowledgment may be held off for read of DM page a6=1.
8: PLL Disabled.
9: Timing Control Register bit PCS = 0.
10: Output Clock Control Register bit PCOS = 0.
11: Jitter on reference input is less than 1ns pp.
12: Applied jitter is sinusoidal.
13: Applied jitter is a squarewave of 8kHz of 32ns pp.
14: PLL Enabled.
15: Timing Control Register bit PCS = 1.
16: Output Clock Control Register bit PCOS = 1.
17: Measured w.r.t. to C4i.
18: Measured w.r.t. to C8 Input Clock.
19: Measured w.r.t. to C4ob.
20: Measured w.r.t. to C8 Output Clock.
21: 1 UIpp = 488ns for 2.048MHz signals.
22: 1 UIpp = 244ns for 4.096MHz signals.
23: 1 UIpp = 122ns for 8.192MHz signals.
24: 1 UIpp = 97.65ns for 10.24MHz signals.
25: No filter
26: Input clock reference selected is not C4F4.
27: C4F4 Input clock reference selected.
28: C8P Input clock reference selected.
29: C8F8 Input clock reference selected.
30: C16F8 Input clock reference selected.
31: C16 Input clock reference and HMVIP selected.
32: Jitter on reference input is 0.008 UIpp. 1UI=244ns.
33: PLL is in Master Mode.
34: PLL is in Slave Mode.
99
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