MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 27

• Manufacturer Part Number: MT90812
• Description: Integrated Digital Switch (IDX)
• Manufacturer: Mitel Networks Corporation

Advance Information
The output channel number m, specified for minimum delay in these four cases account for there being two
4.096Mb/s channels and four 8.192Mb/s channels for every one 2.048Mb/s channel.
Table 7 lists the condition required for a throughput delay of less than one frame period, the throughput delay if
this condition is met and the throughput delay expressed in timeslots when switching is made in the following
frame. For cases where there are different data rates the delay is expressed in timeslots associated with the
fastest data rate. i.e. with the source channel from Est1 (@8Mb/s) and destination channel on STo1 (@2Mb/s)
the delay is expressed in 8Mb/s timeslots. If the incoming 8Mb/s channel, n = 119, outgoing 2Mb/s channel m
=31, then the delay = 4m-n = 4(31)-119= five 8Mb/s timeslots. If m=1 the delay=128-(n-4m)=128-(119-
4)=thirteen 8Mb/s timeslots.
Notes: t.s. = time-slot. t.s
Delays are measured in timeslots and at the point in time from when the input channel is completely shifted in and when the output
channel is completely shifted out.
Sti0/1 -> Est0/1 2.048 Mb/
Sti0/1 -> Est0/1 4.096 Mb/
Sti0/1 -> Est0/1 8.192 Mb/
Source and Destination Streams
Est0/1 2.048 Mb/s -> Sti0/
Source and Destination
Est0/1 -> Est0/1 2.048
Est0/1 -> Est0/1 4.096
Est0/1 -> Est0/1 8.192
Est0/1 4.096 Mb/s ->
Est0/1 8.192 Mb/s ->
Sti0/1 -> Sto0/1
Streams
Est0/1 -> Sto0/1
Est0/1 -> Est0/1
Sti0/1 -> Sto0/1
Sti0/1 -> Est0/1
Sti0/1
Sti0/1
Mb/s
Mb/s
Mb/s
1
s
s
s
2
. =2Mb/s t.s. = 3.9 us. t.s
Table 7 - Throughput Delay for Minimum Delay Mode
Table 6 - Output Channels for Minimum Delay
channel,
n, range
0-127
0-127
Input
0-31
0-31
0-64
0-31
0-31
0-31
0-31
0-64
4
2.048 Mb/s
. =4Mb/s t.s.=1.95 us. t.s
m>=n+2
m, range
channel,
Output
0-127
0-127
0-31
0-31
0-64
0-31
0-64
0-31
0-31
0-31
Condition for
within same
m>=(n+3)/2
m>=(n+5)/4
switching
Expansion Bus Data Rate
m>=2n+3
m>=4n+5
m>=n+2
m>=n+2
m>=n+2
m>=n+2
frame
8
.=8Mb/s t.s.=0.975 us.
m>=(n+3)/2
4.096 Mb/s
m>=2n+3
N/A
Delay within
Throughput
same frame
m-2n t.s
m-4n t.s
2m-n t.s
4m-n t.s
m-n t.s
m-n t.s
m-n t.s
m-n t.s
m-n t.s
m-n t.s
m>=n+2
2
2
4
8
2
2
4
8
4
8
.
.
.
.
.
.
.
.
.
.
m>=(n+5)/4
8.192 Mb/s
m>=4n+5
128-(4n-m) t.s
128-(n-4m) t.s
128-(n-m) t.s
64-(2n-m) t.s
64-(n-2m) t.s
condition not
MT90812
32-(n-m) t.s
32-(n-m) t.s
64-(n-m) t.s
32-(n-m) t.s
32-(n-m) t.s
Throughput
N/A
Delay if
met
2
2
4
2
2
8
4
4
.
.
.
.
.
8
8
.
.
.
.
.
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