MT8VDDT6464HD Micron Semiconductor Products, MT8VDDT6464HD Datasheet - Page 13

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MT8VDDT6464HD

Manufacturer Part Number
MT8VDDT6464HD
Description
(MT8VDDTxx64HD) 200-Pin DDR Sdram Sodimms
Manufacturer
Micron Semiconductor Products
Datasheet
www.DataSheet4U.com
Table 12: I
DDR SDRAM component values only
Notes: 1–5, 8, 10, 12, 50; notes appear on pages 20–23; 0°C £ T
09005aef806e1d28
DD8C16_32_64x64HDG_B.fm - Rev. B 7/03 EN
PARAMETER/CONDITION
NOTE:
OPERATING CURRENT: One device bank; Active-Precharge;
t
changing once per clock cyle; Address and control inputs
changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read Precharge;
Burst = 2;
and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device
banks idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
=
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM andDQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
bank active; Address and control inputs changing once per clock
cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once
per clock cycle;
changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE £ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL
= 4) with auto precharge,
Address and control inputs change only during Active READ or
WRITE commands
RC =
t
CK MIN; CKE = HIGH; Address and other control inputs
a - Value calculated as one module rank in this operating condition, and all other module ranks in I
b - Value calculated reflects all module ranks in this operating condition.
t
t
RC (MIN);
CK =
t
RC =
t
CK (MIN); I
t
t
RC (MIN);
CK =
DD
t
CK =
Specifications and Conditions – 128MB Module
t
CK (MIN); DQ, DM, and DQS inputs
t
CK (MIN); DQ, DM and DQS inputs
OUT
t
RC =
t
t
RC =
CK =
t
= 0mA
CK =
t
RAS (MAX);
t
t
t
CK =
IN
RC (MIN);
CK (MIN); I
t
CK (MIN); CKE = LOW
= V
t
REF
CK (MIN); CKE = (LOW)
for DQ, DQS, and DM
t
t
CK =
OUT
CK =
t
t
RC =
RC = 15.625µs
= 0mA; Address
t
t
CK (MIN);
CK (MIN); DQ,
t
RC (MIN)
t
13
CK
A
£ +70°C; V
I
I
I
I
I
I
I
DD5A
DD4W
I
I
I
SYM
DD3N
I
I
DD2P
DD3P
DD4R
DD2F
DD5
DD6
DD7
DD0
DD1
a
a
b
b
a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
b
b
b
b
a
a
b
128MB, 256MB, 512MB (x64)
DD
1,060
1,432
-335
512
552
180
100
200
572
572
12
20
12
= V
DD
1,332
-262
200-PIN DDR SODIMM
Q = +2.5V ±0.2V
452
492
100
200
532
512
880
12
80
20
12
MAX
-26A/
1,312
-265
432
492
160
180
512
492
880
12
80
20
8
©2003 Micron Technology, Inc. All rights reserved.
1,312
-202
432
492
160
180
512
492
880
12
80
20
8
DD
2p (CKE LOW) mode.
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 46
21, 28, 46
NOTES
20, 44
20, 44
20, 43
20, 44
20, 46
24, 46
20, 45
47
20
9

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