HT46R71D-1 Holtek Semiconductor, HT46R71D-1 Datasheet - Page 8

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HT46R71D-1

Manufacturer Part Number
HT46R71D-1
Description
Dual Slope A/D Type MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
Program Memory - EPROM
The program memory (EPROM) is used to store the pro-
gram instructions which are to be executed. It also con-
tains data, table, and interrupt entries, and is organized
into 2048 14 bits which are addressed by the program
counter and table pointer.
Certain locations in the ROM are reserved for special
usage:
Note:
Rev. 1.00
TABRDC [m]
TABRDL [m]
Location 000H
Location 000H is reserved for program initialization.
After chip reset, the program always begins execution
at this location.
Location 004H
Location 004H is reserved for the external interrupt
service program. If the INT input pin is activated, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 004H.
Location 008H
Location 008H is reserved for the Timer/Event Coun-
ter 0 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 008H.
Location 00CH
Location 00CH is reserved for the Timer/Event Coun-
ter 1 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 1 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 00CH.
Instruction(s)
*10~*0: Table location bits
@7~@0: Table pointer bits
Program Memory
P10
*10
1
P9
*9
1
P8
*8
1
@7
@7
*7
Table Location
8
@6
@6
*6
Table Location
Stack Register - STACK
The stack register is a special part of the memory used
to save the contents of the program counter. The stack
is organized into 4 levels and is neither part of the data
nor part of the program, and is neither readable nor
writeable. Its activated level is indexed by a stack
pointer (SP) and is neither readable nor writeable. At the
start of a subroutine call or an interrupt acknowledg-
ment, the contents of the program counter is pushed
onto the stack. At the end of the subroutine or interrupt
routine, signaled by a return instruction (RET or RETI),
the contents of the program counter is restored to its
previous value from the stack. After chip reset, the SP
will point to the top of the stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag is recorded but the ac-
knowledgment is still inhibited. Once the SP is decre-
mented (by RET or RETI), the interrupt is serviced. This
feature prevents stack overflow, allowing the program-
mer to use the structure easily. Likewise, if the stack is
full, and a CALL is subsequently executed, a stack
overflow occurs and the first entry is lost (only the most
recent 4 return addresses are stored).
P10~P8: Current program counter bits
Location 010H
Location 010H is reserved for the ADC interrupt ser-
vice program. If an ADC interrupt occurs, and if the in-
terrupt is enabled and the stack is not full, the program
begins execution at this location.
Table location
Any location in the ROM can be used as a look-up ta-
ble. The instructions TABRDC [m] (the current page,
1 page=256 words) and TABRDL [m] (the last page)
transfer the contents of the lower-order byte to the
specified data memory, and the contents of the
higher-order byte to TBLH (Table Higher-order byte
register) (08H). Only the destination of the lower-order
byte in the table is well-defined; the other bits of the ta-
ble word are all transferred to the lower portion of
TBLH. The TBLH is read only, and the table pointer
(TBLP) is a read/write register (07H), indicating the ta-
ble location. Before accessing the table, the location
should be placed in TBLP. All the table related instruc-
tions require 2 cycles to complete the operation.
These areas may function as a normal ROM depend-
ing upon the user s requirements.
@5
@5
*5
@4
@4
*4
@3
@3
*3
@2
@2
*2
HT46R71D-1
@1
@1
*1
May 14, 2007
@0
@0
*0

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