DS26502 Maxim Integrated Products, DS26502 Datasheet - Page 122

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DS26502

Manufacturer Part Number
DS26502
Description
T1/E1/J1/64KCC BITS Element
Manufacturer
Maxim Integrated Products
Datasheet

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Figure 20-11. Transmit Timing, T1, E1, 64KCC Mode
RCLK, JA CLOCK
(REFER TO THE TRANSMIT PLL BLOCK DIAGRAM,
NOTE 1: TS_8K_4 IN OUTPUT MODE.
NOTE 2: TS_8K_4 IN INPUT MODE.
NOTE 3: TX CLOCK IS THE INTERNAL CLOCK THAT DRIVES THE TRANSMIT SECTION. THE
SOURCE OF THIS SIGNAL DEPENDS ON THE CONFIGURATION OF THE TRANSMIT PLL. IF TX
CLOCK IS GENERATED BY THE TRANSMIT PLL (CONVERSION FROM ANOTHER CLOCK RATE)
THEN THE USER SHOULD OUTPUT THAT SIGNAL ON THE PLL_OUT PIN AND USE THAT SIGNAL
TO REFERENCE TSER AND TS_8K_4 IF TS_8K_4 IS IN THE INPUT MODE.
NOTE 4: RCLK (THE RECOVERED LINE CLOCK) AND JA CLOCK (AN INTERNAL CLOCK DERIVED
FROM MCLK) MAY BE SELECTED AS THE SOURCE FOR THE TRANSMIT PLL OR USED
UNCONVERTED FOR TX CLOCK.
TX CLOCK
TS_8K_4
TS_8K_4
TSER
PLL_OUT
TCLK
1
2
t
R
3
4
t D3
F t
t D2
122 of 124
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Figure
t SU
t SU
3-3.)
t HD
DS26502 T1/E1/J1/64KCC BITS Element
t
CL
t
CP
t
CH

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