DS26502 Maxim Integrated Products, DS26502 Datasheet - Page 3

• Manufacturer Part Number: DS26502
• Description: T1/E1/J1/64KCC BITS Element
• Manufacturer: Maxim Integrated Products

8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
7.7
8.1
9.1
9.2
11.1
11.2
11.3
12.1
12.2
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.8
15.1
15.2
16.1
16.2
17.1
17.2
13.2.1 Receive Level Indicator ............................................................................................77
13.2.2 Receive G.703 Section 10 Synchronization Signal ..................................................78
13.2.3 Monitor Mode ...........................................................................................................78
13.3.1 Transmit Short-Circuit Detector/Limiter ....................................................................79
13.3.2 Transmit Open-Circuit Detector................................................................................79
13.3.3 Transmit BPV Error Insertion ...................................................................................79
13.3.4 Transmit G.703 Section 10 Synchronization Signal (E1 Mode)................................79
T1 FRAMER/FORMATTER CONTROL REGISTERS ....................................................39
E1 FRAMER/FORMATTER CONTROL REGISTERS....................................................45
I/O PIN CONFIGURATION OPTIONS ............................................................................51
T1 SYNCHRONIZATION STATUS MESSAGE ..............................................................54
E1 SYNCHRONIZATION STATUS MESSAGE ..............................................................63
LINE INTERFACE UNIT (LIU) ........................................................................................76
LOOPBACK CONFIGURATION.....................................................................................94
64KHZ SYNCHRONIZATION INTERFACE....................................................................95
6312KHZ SYNCHRONIZATION INTERFACE................................................................97
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ...................98
I
T1 C
E1 C
E1 I
T1 B
T
R
S
A
LIU O
LIU R
LIU T
MCLK P
J
CMI (C
LIU C
R
R
T
R
T
I
T
NTERRUPT
NSTRUCTION
ITTER
RANSMIT
RANSMIT
RANSMIT
EST
A
LTERNATE
ECEIVE
ECOMMENDED
ECEIVE
ECEIVE
/S
NFORMATION
ONTROL
ONTROL
IT
I
R
RANSMITTER
ECEIVER
ONTROL
B
PERATION
-O
A
EGISTERS
ODE
IT
TTENUATOR
RE
BOC...............................................................................................................55
64
6312
RIENTED
A
BOC.............................................................................................................54
64
6312
I
-S
CCESS
NFORMATION
K
S
M
R
H
K
R
A
R
CALER
ARK
H
R
K
EGISTERS
/S
Z
EGISTERS
..............................................................................................................77
EGISTER
H
K
C
Z
EGISTERS
............................................................................................................77
S
R
.........................................................................................................103
I
H
Z
IRCUITS
S
YNCHRONIZATION
C
B
.........................................................................................................78
B
I
EGISTERS
Z
S
NVERSION
YNCHRONIZATION
IT
ODE
ASED ON
......................................................................................................79
......................................................................................................79
S
YNCHRONIZATION
A
YNCHRONIZATION
CCESS
...............................................................................................102
(BOC) C
R
...............................................................................................39
...............................................................................................45
..............................................................................................89
.............................................................................................81
EGISTERS
..........................................................................................47
) O
CRC4 M
B
ASED ON
PTION
ONTROLLER
I
NTERFACE
..............................................................................38
I
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NTERFACE
I
ULTIFRAME
...........................................................................80
NTERFACE
I
NTERFACE
D
OUBLE
................................................................54
O
O
PERATION
...........................................................63
-F
O
PERATION
O
RAME
PERATION
PERATION
DS26502 T1/E1/J1/64KCC BITS Element
...............................................73
............................................95
..........................................96
........................................97
.......................................97