DS26502 Maxim Integrated Products, DS26502 Datasheet - Page 49

• Manufacturer Part Number: DS26502
• Description: T1/E1/J1/64KCC BITS Element
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bit 0: Receive Loss of Frame Condition (RLOF). Set when the DS26502 is not synchronized to the received data stream.
Bit 1: Receive Loss Of Signal Condition (RLOS). Set when 255 (or 2048 if E1RCR.6 = 1) E1 mode or 192 T1 mode
consecutive zeros have been detected. In 6312kHz Synchronization Interface Mode, this bit will be set when the signal
received is out of range as defined by the G.703 Appendix II specification.
Bit 2: Receive Alarm Indication Signal (T1= Blue Alarm, E1= AIS) Condition (RAIS). Set when an unframed all-ones
code is received.
Bit 3: Receive Yellow Alarm Condition (RYEL). (T1 only) Set when a yellow alarm is received.
Bit 4: Receive Loss of Frame Clear Event (RLOFC). Set when the framer achieves synchronization; will remain set until
read.
Bit 5: Receive Loss Of Signal Clear Event (RLOSC). Set when loss of signal condition is no longer detected.
Bit 6: Receive Alarm Indication Signal Clear Event (RAISC). Set when the unframed all-ones condition is no longer
detected.
Bit 7: Receive Yellow Alarm Clear Event (RYELC). (T1 only) Set when the yellow alarm condition is no longer detected
RYELC
X
7
0
RAISC
SR2
Status Register 2
16h
X
6
0
RLOSC
X
5
0
RLOFC
X
4
0
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RYEL
X
3
0
PIN 29
RAIS
RAIS
2
0
DS26502 T1/E1/J1/64KCC BITS Element
PIN 32
RLOS
RLOS
1
0
PIN 30
RLOF
LOF
0
0
.