AN2442 Freescale Semiconductor / Motorola, AN2442 Datasheet - Page 11

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AN2442

Manufacturer Part Number
AN2442
Description
Booting the MSC8102 Device Through TDM
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Freescale Semiconductor, Inc.
Example Boot Master Code
Example 1. Initialize the Boot Mode
; -------------------------------------------
; Initialize MSC8102 boot mode
;
; MSC8101 - 66 MHz oscillator
; MSC8102 - 41.6 MHz oscillator
;
; MSC8102ADS switch settings
; SW4[1:4] = OFF OFF ON OFF
; SW6[1:8] = ON OFF OFF ON ON ON OFF OFF
; JP5 open
; -------------------------------------------
; Set MSC8102 boot from TDM
write_l #$FA000000,BCSR3
; Get HCW from system bus
write_l #$07000000,BCSR2
; Assert /PORESET
write_l #$7F000000,BCSR1
; Negate /PORESET
write_l #$FF000000,BCSR1
; Wait ~15ms
move.l #$C0000,d0
jsr
delay
5.2 Initialize the TDM Pins
The MSC8101 boot master generates the TDM clock and frame sync signals that are input to the
MSC8102. Figure 9 shows the pin connections. The output of the baud-rate generator
connects
BRG5O
to the MSC8102 receive and transmit clock pins,
and
. It also connects to the
TDM3RCLK
TDM3TCLK
MSC8101 receive and transmit clock pins
and
. The CMX Clock Route Register
L1RCLK
L1TCLK
(CMXSI1CR) selects
and
as the receive and transmit clocks.
is also the source of the
CLK1
CLK2
BRG5O
frame sync signals. It connects to the timer input
pin. The timer divides the
input frequency to
TIN2
TIN2
generate the frame sync pulse on
for every 32 clock cycles on
.
connects to the
TOUT2
TIN2
TOUT2
MSC8102 receive and transmit frame sync pins,
and TDM3TSYN .
also connects to
TDM3RSYN
TOUT2
the MSC8101 frame sync pin,
.
L1RSYN
Finally, the MSC8101 receive and transmit data pins
and
connect to the MSC8102
L1TCLK
L1RCLK
receive and transmit data pins
and
. Example 2 shows the pin configuration
TDM3RDAT
TDM3TDAT
code.
11
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