AN2442 Freescale Semiconductor / Motorola, AN2442 Datasheet - Page 18

• Manufacturer Part Number: AN2442
• Description: Booting the MSC8102 Device Through TDM
• Manufacturer: Freescale Semiconductor / Motorola

Example Boot Master Code
5.7 Enable the TDM
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data on TDMA1 to MCC1 channels 0 through 3. Similarly, the transmit SI RAM is programmed to route
four bytes data from MCC1 channels 0 through 3 on TDMA1. The SI1 configuration code is shown in
Example 7.
; -------------------------------------------
; Rx and Tx sync 1-bit delay
; Sync active on "1"
; Tx data on falling edge
; Rx data on rising edge
; Sync sampled on rising edge
; -------------------------------------------
write_w #$0159,SI1AMR
; -------------------------------------------
; Configure the SI RAM
; Entry 0: $8002 - Ch 0, 1 byte
; Entry 1: $8022 - Ch 1, 1 byte
; Entry 2: $8042 - Ch 2, 1 byte
; Entry 3: $8063 - Ch 3, 1 byte
; -------------------------------------------
_loop_si
The last step of the boot process enables the MCC1 interrupts and enables TDMA1 to begin transmitting
and receiving data (see Example 8). A short delay occurs before the system enters Debug mode. At this
point, the BTAMs from the MSC8102 can be checked in the receive buffer for channel 3 at memory
location 0x230000. The receive data may be compared to the expected BTAMs described in Figure 8.
; Enable MCC1 and MCC2 interrupts
; -------------------------------------------
; Enable TDMA1
; -------------------------------------------
write_b #$01,SI1GMR
move.l #$C0000,d0
jsr delay
debug
move.l #SI1TxRAM,r0
move.l #SI1TxRAM+$800,r1
clr d0
clr d1
jsr set_block
move.l #SI1RxRAM,r0
move.l #SI1TxRAM,r1
move.l #$00008002,d0
move.l #$00000020,d1
move.l #$00008062,d2
write_l #$0C000000,SIMR_L
Freescale Semiconductor, Inc.
For More Information On This Product,
Example 7. Configure the SI
Example 8. Enable the TDM
Go to: www.freescale.com