RTL8181 ETC, RTL8181 Datasheet - Page 28

no-image

RTL8181

Manufacturer Part Number
RTL8181
Description
Wireless LAN Access Point/Gateway Controller
Manufacturer
ETC
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RTL8181
Manufacturer:
REALTEK
Quantity:
5 000
Part Number:
RTL8181
Manufacturer:
REALTBK
Quantity:
20 000
www.DataSheet4U.com
0
0
0
0
0
0
4
4
4
8
Reception Descriptor
Rx Command Descriptor (OWN=1)
O
W
N
=
1
Bye
Offset#
0
0
CONFIDENTIAL
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
E
O
R
22
21
20
19-16 CC3-0
23-16 -
15-0 Frame_Le
31-18 RSEV
17-16 TAGC
15-0 VLAN_T
31-0 TxBuff
Bit# Bit Name
31
30
OWC
LNKF
EXC
ngth
AG
OWN
EOR
RESV
Out of Window Collision. A status bit. Out of window collision, When
set, it means an “out-of-window” collision is encountered during
transmitting packet.
Link Failure. A status bit. NIC sets this bit to inform link failure to
driver
Excessive Collision. When set, indicates that the transmission was
aborted owing to consecutive 16 collisions.
Collision Counter. When Own bit =0, it ’s a status field, A 4-bit
collision counter, shows the total collision times before the packet was
transmitted.
Reserved.
Transmit frame length. This field indicates the length in TX buffer, in
byte, to be transmitted
Reserved.
VLAN tag control bits:
00: Packet remains unchanged when transmitting.
10: Add TAG. 0x8100 (Ethernet encoded tag protocol ID, indicating
that this is an IEEE 802.1Q VLAN packet) is inserted after source
address, and 2 bytes are inserted after tag protocol ID from
VLAN_TAG field in transmit descriptor.
The 2-byte VLAN_TAG contains information, from upper layer, of
user priority, canonical format indicator, and VLAN ID. Please refer to
IEEE 802.1Q for detailed VLAN tag information.
Logic Address of transmission buffer.
RESV
Description
When set, indicates that the descriptor is owned by NIC, and is
ready to receive packet. The OWN bit is set by driver after
having pre-allocated buffer at initialization, or the host has
released the buffer to driver. In this case, OWN=1.
End of Rx descriptor Ring. Set to 1 indicates that this descriptor
is the last descriptor of Rx descriptor ring. Once NIC’ s internal
receive descriptor pointer reaches here, it will return to the first
descriptor of Rx descriptor ring after this descriptor is used by
packet reception.
RX_BUFFER_ADDRESS
Dummy
T
A
V
A
28
VLAN_TAG
8
7
Buffer_Size
6
5
4
3
2
1
0
Offset 0
Offset 4
Offset 8
Offset 12
RTL8181
v1.0

Related parts for RTL8181