MT9074AL Zarlink Semiconductor, Inc., MT9074AL Datasheet - Page 62

• Manufacturer Part Number: MT9074AL
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Zarlink Semiconductor, Inc.

MT9074
62
Bit
7
6
5
4
3
2
1
0
MFSYNI Multiframe
TFSYNI Terminal Frame Synchronization
TxSLPI Transmit SLIP Interrupt. When
RxSLPI Receive SLIP Interrupt. When
Name
LOSI
AISI
- - -
SEI
Table 66 - Interrupt Word Zero
(Page 4, Address 1BH) (T1)
Interrupt. When unmasked this
interrupt bit goes high whenever a
change of state of terminal frame
synchronization
Reading this register clears this bit.
Interrupt. When unmasked this
interrupt bit goes high whenever a
change of
synchronization
Reading this register clears this bit.
Unused.
Alarm Indication Signal Interrupt.
When unmasked this interrupt bit
goes high whenever a change of
state of received all ones condition
exists. Reading this register clears
this bit.
Loss of Signal Interrupt. When
unmasked this interrupt bit goes
high whenever a change of state of
loss of signal (either analog - signal
40 dB below nominal or digital - 192
consecutive 0’s received) condition
exists. Reading this register clears
this bit.
Severely Errored Frame Interrupt.
When unmasked this interrupt bit
goes high whenever a sequence of
2 framing errors out of 6 occurs.
Reading this register clears this bit.
unmasked this interrupt goes high
whenever a controlled frame slip
occurs in the transmit elastic buffer.
Reading this register clears this bit.
unmasked this interrupt bit goes
high whenever a controlled frame
slip occurs in the receive elastic
buffer. Reading this register clears
this bit.
Functional Description
state of
condition
condition
Synchronization
multiframe
exists.
exists.
Bit
7
6
5
4
3
2
1
0
COFAI Change
PRBSI Psuedo
Name
CRCI CRC-6
BPVI Bipolar Violation Interrupt. When
PDVI Pulse Density Violation Interrupt.
YELI
FEI
- - -
Table 67 - Interrupt Word One
(Page 4, Address 1CH) (T1)
Framing Bit Error Interrupt. When
unmasked this interrupt bit goes high
whenever an erroneous framing bit is
detected (provided the circuit is in
terminal frame sync). Reading this
register clears this bit.
unmasked this interrupt bit goes high
whenever a local CRC-6 error occurs.
Reading this register clears this bit.
Yellow
unmasked this interrupt bit goes high
upon detection of a yellow alarm.
Reading this register clears this bit.
Interrupt.
interrupt bit goes high whenever a
change of frame alignment occurs
after a reframe. Reading this register
clears this bit.
unmasked this interrupt bit goes high
whenever
(excluding
encountered. Reading this register
clears this bit.
Error Interrupt. When unmasked this
interrupt bit goes high upon detection
of an error with a channel selected for
PRBS testing. Reading this register
clears this bit.
When unmasked this interrupt bit goes
high whenever in the absence of B8ZS
coding a sequence of 16 consecutive
zeros is received on the line, or the
incoming pulse density is less than N
ones in a time frame of 8(N+1) where
N = 1 to 23. In the case of B8ZS
coding, the interrupt is set upon
detection of 8 consecutive zeros.
Reading this register clears this bit.
Unused.
Functional Description
Alarm
Error
Random
of
When
a
B8ZS
Frame
Interrupt.
bipolar
Interrupt.
unmasked
Bit
encoding)
Data Sheet
Alignment
Sequence
violation
When
When
this
is