upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 261

• Manufacturer Part Number: upd78f0124m6gba1-8et
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(3) Baud rate generator control register 0 (BRGC0)
Address: FF71H After reset: 1FH R/W
BRGC0
Notes 1.
Symbol
This register selects the base clock of serial interface UART0 and the division value of the 5-bit counter.
BRGC0 can be set by an 8-bit memory manipulation instruction.
RESET input sets this register to 1FH.
2.
Set the base clock to satisfy the following conditions.
• V
• V
• V
• V
When selecting the TM50 output as the base clock, note the following.
• PWM mode (TMC506 = 1)
• Mode in which clear & start occurs on a match of TM50 and CR50 (TMC506 = 0)
In the both modes, it is not necessary to enable the timer output for the TO50 pin.
MDL04
TPS01
TPS01
Set the clock to 50% duty and start the 8-bit timer/event counter 50 operation beforehand.
Enable the timer F/F inversion operation (TMC501 = 1) and start the 8-bit timer/event counter 50
operation beforehand.
7
0
0
1
1
0
0
0
0
1
1
1
1
1
1
•
•
•
•
•
DD
DD
DD
DD
Figure 13-4. Format of Baud Rate Generator Control Register 0 (BRGC0)
= 4.0 to 5.5 V: Base clock ≤ 10 MHz
= 3.3 to 4.0 V: Base clock ≤ 8.38 MHz
= 2.7 to 3.3 V: Base clock ≤ 5 MHz
= 2.5 to 2.7 V: Base clock ≤ 2.5 MHz
MDL03
TPS00
TPS00
6
0
1
0
1
0
1
1
1
•
•
•
•
•
1
1
1
1
1
1
CHAPTER 13 SERIAL INTERFACE UART0
TM50 output
f
f
f
X
X
X
/2 (5 MHz)
/2
/2
MDL02
3
5
(1.25 MHz)
(312.5 kHz)
5
0
×
0
0
0
•
•
•
•
•
0
0
1
1
1
1
User’s Manual U16315EJ3V1UD
Note 2
MDL04
MDL01
4
×
0
0
1
•
•
•
•
•
1
1
0
0
1
1
Base clock (f
MDL03
MDL00
0
1
0
0
1
0
1
0
1
3
×
•
•
•
•
•
XCLK0
) selection
10
26
27
28
29
30
31
k
×
8
9
•
•
•
•
•
MDL02
2
Setting prohibited
f
f
f
f
f
f
f
f
f
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
Selection of 5-bit counter
Note 1
/8
/9
/10
/26
/27
/28
/29
/30
/31
MDL01
output clock
1
•
•
•
•
•
MDL00
0
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