upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 520

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upd78f0124m6gba1-8et

Manufacturer Part Number
upd78f0124m6gba1-8et
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
520
This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Operating
frequency
rating
Pin
connection
Pin
functions
Memory
space
Port
functions
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
Peripheral
function: Count
clock, base
clock
Flash memory
REGC pin
IMS: Internal
memory size
switching
register
SFR area:
Special function
register
SP: Stack
pointer
P10, P11, P12
P60 to P63
Details of
Function
The specifications of the peripheral functions (timer, serial interface, A/D
converter, etc.) are conventional when operating at V
Therefore, to select the count clock or base clock of a peripheral function,
satisfy the following conditions.
• V
• V
• V
• V
Rewrite the flash memory in the ranges of f
5.5 V as ever.
Connect the IC (Internally Connected) pin directly to V
Connect the AV
Connect the REGC pin as follows.
Connect the V
A regulator cannot be used with (A1) grade products and (A2) grade products.
Be sure to connect the REGC pin of these products directly to V
Regardless of the internal memory capacity, the initial value of the internal
memory size switching register (IMS) of all products in the 78K0/KD1 is fixed
(IMS = CFH). Therefore, set the value corresponding to each product as
indicated below.
µ
µ
µ
µ
µ
Do not access addresses to which SFRs are not assigned.
Since RESET input makes the SP contents undefined, be sure to initialize the
SP before using the stack.
When P10/SCK10/TxD0, P11/SI10/RxD0, and P12/SO10 are used as general-
purpose ports, do not write to serial clock selection register 10 (CSIC10).
Use of a pull-up resistor can be specified for P60 to P63 pins by a mask option
only in the mask ROM versions.
In the case of a 1-bit memory manipulation instruction, although a single bit is
manipulated, the port is accessed as an 8-bit unit. Therefore, on a port with a
mixture of input and output pins, the output latch contents for pins specified as
input are undefined, even for bits other than the manipulated bit.
PD780121: 42H
PD780122: 44H
PD780123: C6H
PD780124: C8H
PD78F0124: Value corresponding to mask ROM version
APPENDIX D LIST OF CAUTIONS
DD
DD
DD
DD
= 4.0 to 5.5 V: Count clock or base clock ≤ 10 MHz
= 3.3 to 4.0 V: Count clock or base clock ≤ 8.38 MHz
= 2.7 to 3.3 V: Count clock or base clock ≤ 5 MHz
= 2.5 to 2.7 V: Count clock or base clock ≤ 2.5 MHz
User’s Manual U16315EJ3V1UD
PP
SS
pin to EV
pin to V
SS
SS
.
or V
SS
during normal operation.
Cautions
X
= 2 to 10 MHz and V
DD
SS
= 2.7 to 5.5 V.
.
DD
DD
.
= 2.7 to
p. 17
p. 17
p. 22
p. 22
p. 22
p. 22
p. 40
p. 45
p. 52
p. 59
p. 85
p. 101
p. 102
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