si4430 Silicon Laboratories, si4430 Datasheet - Page 24

• Manufacturer Part Number: si4430
• Description: Si4430 Ism Transceiver
• Manufacturer: Silicon Laboratories

Si4430
3.5. System Timing
The system timing for TX and RX modes is shown in Figures 8 and 7. The timing is shown transitioning from
STANDBY mode to TX mode and going automatically through the built-in sequencer of required steps. If a small
range of frequencies is being used and the temperature range is fairly constant a calibration may only be needed at
the initial power up of the device. The relevant system timing registers are shown below.
The VCO will automatically calibrate at every frequency change or power up. The VCO CAL may also be forced by
setting the vcocal bit. The 32.768 kHz RC oscillator is also automatically calibrated but the calibration may also be
forced. The enrcfcal will enable the RC Fine Calibration which will occur every 30 seconds. The rccal bit will force a
complete calibration of the RC oscillator which will take approximately 2 ms. The PLL T0 time is to allow for bias
settling of the VCO, the default for this should be adequate. The PLL TS time is for the settling time of the PLL,
which has a default setting of 200 µs. This setting should be adequate for most applications but may be reduced if
small frequency jumps are used. For more information on the PLL register configuration options, see “Register
53h. PLL Tune Time,” on page 126 and “Register 55h. Calibration Control,” on page 127.
24
Add R/W Function/Description
53
54
55
R/W
R/W
R/W
XTAL Settling
600us
Time
Calibration Control
PLL Tune Time
Reserved 1
D7
X
starthalf
Figure 7. TX Timing
xtal-
D6
X
Preliminary Rev. 0.4
adccal-
pllts[4:0]
done
D5
X
enrcfcal
D4
X
rccal
TX Packet
D3
X
caldp
vco-
D2
X
pllt0[2:0]
vcocal
D1
X
skip-
vco
D0
X
POR Def.
45h
00h
04h