si4430 Silicon Laboratories, si4430 Datasheet - Page 38

• Manufacturer Part Number: si4430
• Description: Si4430 Ism Transceiver
• Manufacturer: Silicon Laboratories

Si4430
The reference frequency to the PLL is 10 MHz. The PLL utilizes a differential L-C VCO, with integrated on-chip
spiral inductors. The output of the VCO is followed by a configurable divider which will divide down the signal to the
desired output frequency band. The modulus of this divider stage is controlled dynamically by the output from the
- modulator. The tuning resolution of the - modulator is determined largely by the over-sampling rate and the
number of bits carried internally. The tuning resolution is sufficient to tune to the commanded frequency with a
maximum accuracy of 312.5 Hz anywhere in the range between 900–960 MHz.
5.6.1. VCO
A 2X VCO is utilized to help avoid problems due to frequency pulling, especially when turning on the integrated
Power Amplifier. In receive mode, the LO frequency is automatically shifted downwards (without reprogramming)
by the IF frequency of 937.5 kHz, allowing transmit and receive operation on the same frequency. The VCO
integrates the resonator inductor, tuning varactor, so no external VCO components are required.
The VCO uses capacitance bank to cover the wide frequency range specified. The capacitance bank will
automatically be calibrated every time the synthesizer is enabled. In certain fast hopping applications this might not
be desirable so the VCO calibration may be skipped by setting the appropriate register.
5.7. Power Amplifier
The Si4430 contains an internal integrated power amplifier (PA) capable of transmitting at output levels between
–8 to +13 dBm. The output power is programmable in 3 dB steps through the txpow[2:0] field in "Register 6Dh. TX
Power".
The PA design is single-ended and is implemented as a two stage class CE amplifier with efficiency in the range of
45–50% while transmitting at maximum power. The efficiency drops to approximately 20% when operating at the
lowest power steps. Due to the high efficiency a simple filter is required on the board to filter the harmonics. The PA
output is ramped up and down to prevent unwanted spectral splatter.
5.7.1. Output Power Selection
The output power is configurable in 3 dB steps from –8 to +13 dBm with the txpow[2:0] field in "Register 6Dh. TX
Power". The PA output is ramped up and down to prevent unwanted spectral splatter.
Extra output power can allow use of a cheaper, smaller antenna reducing the overall BOM cost. The higher power
setting of the chip achieves maximum possible range, but of course comes at the cost of higher TX current
consumption. However, depending on the duty cycle of the system, the effect on battery life may be insignificant.
Contact Silicon Labs Support for help in evaluating this tradeoff.
38
Add R/W Function/Description
6D
R/W
TX Power
D7
txpow[2:0]
000
001
010
011
100
101
110
111
D6
Preliminary Rev. 0.4
D5
Output Power
D4
+10 dBm
+13 dBm
+1 dBm
+4 dBm
+7 dBm
–8 dBm
–5 dBm
–2 dBm
D3
txpow[2]
D2
txpow[1]
D1
txpow[0]
D0
POR Def.
07h