si4430 Silicon Laboratories, si4430 Datasheet - Page 51

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si4430

Manufacturer Part Number
si4430
Description
Si4430 Ism Transceiver
Manufacturer
Silicon Laboratories
Datasheet

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The clock recovery oversampling rate is set via rxosr[10:0] in "Register 20h. Clock Recovery Oversampling Rate"
and "Register 21h. Clock Recovery Offset 2".
ndec_exp and dwn3_bypass together with the receive data rate (Rb) are used to calculate rxosr:
Where: Rb is in kbps and enmanch is the Manchester Coding parameter. The resulting rxdr[10:0] value should be
rounded to an integer hexadecimal number.
The clock recovery offset ncoff[19:0] in "Register 21h. Clock Recovery Offset 2", "Register 22h. Clock Recovery
Offset 1", and "Register 23h. Clock Recovery Offset 0" is calculated as follows:
Where: Rb is in kbps.
The clock recovery gain crgain[10:0] in "Register 24h. Clock Recovery Timing Loop Gain 1" and "Register 25h.
Clock Recovery Timing Loop Gain 0" is calculated as follows:
ncoff
rxosr
Rb(1+ enmanch) [kbps]
Min
40
0
1
2
3
8
Table 19. ndec[2:0] Settings
Rb
2
500
500
ndec
crgain
Preliminary Rev. 0.4
1 (
_
exp
1
1
enmanch
3
2
2
2 
Max
Rb
40
65
1
2
3
8
dwn
dwn
rxosr
2
1 (
)
16
3
3
_
_
2
enmanch
bypass
20
bypass
ndec[2:0]
ndec
_
exp
5
4
3
2
1
0
)
Si4430
51

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