nsc800 National Semiconductor Corporation, nsc800 Datasheet - Page 4

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nsc800

Manufacturer Part Number
nsc800
Description
Nsc800tm High-performance Low-power Cmos Microprocessor
Manufacturer
National Semiconductor Corporation
Datasheet

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t
T
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
X
R
F
L
H
ACC(OP)
ACC(MR)
AFR
BABE
BABF
BACL
BRH
BRS
CAF
CAR
CRD
CRF
DAI
DAR
DAW
D(BACK)1
D(BACK)2
D(I)
DPA
D(WAIT)
Symbol
4 0 AC Electrical Characteristics
OP
MR
Opcode Fetch
Memory Read
Period at XIN and XOUT
Pins
Period at Clock Output
(
Clock Rise Time
Clock Fall Time
Clock Low Time
Clock High Time
ALE to Valid Data
ALE to Valid Data
AD(0 –7) Float after
RD Falling
BACK Rising to Bus
Enable
BACK Falling to
Bus Float
BACK Fall to CLK
Falling
BREQ Hold Time
BREQ Set-Up Time
Clock Falling ALE
Falling
Clock Rising to ALE
Rising
Clock Rising to
Read Rising
Clock Rising to
Refresh Falling
ALE Falling to INTA
Falling
ALE Falling to
RD Falling
ALE Falling to
WR Falling
ALE Falling to BACK
Falling
BREQ Rising to BACK
Rising
ALE Falling to INTR
NMI RSTA-C PS
BREQ Inputs Valid
Rising PS to
Falling ALE
ALE Falling to
WAIT Input Valid
e
2 t
X
Parameter
)
1000 6667 400 6667
2460
Min
500
435
450
425
100
445
400
900
500
500
NSC800-1
0
0
0
3333 200 3333
1340
1875
1000
1010 350
1610 200
1360
1685 200
Max
110
100
100
575
550
70
50
70
80
0
Min
150
145
125
160
160
975
NSC800-3
50
0
0
0
V
Max
CC
110
490
620
400
100
250
420
700
475
760
250
60
50
65
90
70
0
e
5V
4
Min
142
284
100
225
635
140
140
NSC800-35
90
85
60
50
95
0
0
0
g
10% GND
3333
6667
Max
340
405
300
180
300
540
284
580
170
90
55
50
60
90
90
70
0
e
Min
125 3333
250 6667
200
560
125
125
NSC800-4
80
75
55
45
85
90
0
0
0
0V unless otherwise specified
Max
300
360
250
160
265
475
250
510
125
80
50
50
55
80
80
65
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Measured from
10%– 90% of signal
Measured from
10%– 90% of signal
50% duty cycle square
wave input on XIN
50% duty cycle square
wave input on XIN
Add t for each WAIT STATE
Add t for each WAIT state
Add t for opcode fetch cycles
Add t for each WAIT state
Add t for opcode fetch cycles
See Figure 14 also
Add t for each WAIT STATE
Notes

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